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IBM and AMD Create First 22nm SRAM Cell

kdawson posted more than 5 years ago | from the moore-and-moore-tiny dept.

IBM 83

arcticstoat notes an announcement from IBM that, along with technology partners, they have produced the first working sample of a SRAM cell built on a 22nm fabrication process. According to the article, this represents the next generation after 32nm process chips and won't be in products for some years. "The technology was developed with several partners, including AMD, Toshiba, STMicroelectronics and Freescale, as well as the College of Nanoscale Science and Engineering, where IBM performs a lot of its semiconductor research. IBM says that the cell's development involved 'novel fabrication processes,' including high-NA immersion lithography..., high-K metal gate stacks, extremely thin silicide, damascene copper contacts, and advanced activation techniques."

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83 comments

IBM and AMD (1)

geekmansworld (950281) | more than 5 years ago | (#24664397)

My, my... take that Intel.

Re:IBM and AMD (1, Insightful)

Anonymous Coward | more than 5 years ago | (#24664475)

Yes, it's very impressive that it took IBM, AMD, Toshiba, STMicroelectronics and Freescale, as well as the College of Nanoscale Science and Engineering to beat intel at their own game.

Re:IBM and AMD (4, Funny)

XanC (644172) | more than 5 years ago | (#24664489)

Morgan Freeman? Is that you? [xkcd.com]

Re:IBM and AMD (0, Redundant)

geekmansworld (950281) | more than 5 years ago | (#24664513)

Son, I believe you may be suffering from a disorder known as Freemanic Paracusia. ... isn't that something...

Re:IBM and AMD (0)

Anonymous Coward | more than 5 years ago | (#24665213)

Is that you?

Yes... and I did everything on my bucket list [youtube.com]

Re:IBM and AMD (1, Funny)

pilgrim23 (716938) | more than 5 years ago | (#24664515)

In other news IBM and AMD have hired linguists to invent new words for this process. "silicide, damascene copper contacts, and advanced activation techniques." seemed far to cool to saddle with the brand- name of the new "Blubberon(TM)" and "Humpderon(TM) processor line.

Re:IBM and AMD (4, Informative)

Anonymous Coward | more than 5 years ago | (#24665023)

In other news IBM and AMD have used words I don't know

Is that what you meant to say?

Silicide [wikipedia.org] . Damascene [wikipedia.org] . And have you never heard of a Damascene conversion?

Ah, Silicide (5, Funny)

Pope (17780) | more than 5 years ago | (#24665103)

Like when a clown kills itself.

Re:Ah, Silicide (1)

guardiangod (880192) | more than 5 years ago | (#24665473)

Or when a pope order a clown to kill himself.

Re:Ah, Silicide (0)

Anonymous Coward | more than 5 years ago | (#24665645)

Ah, yes. That all too common occurrence of popes ordering people to kill themselves. No one would ever have to guess what you're talking about.

Re:Ah, Silicide (1)

Sj0 (472011) | more than 5 years ago | (#24673917)

The pope finds your lack of faith distrubing.

Re:IBM and AMD (5, Informative)

vigour (846429) | more than 5 years ago | (#24665387)

In other news IBM and AMD have hired linguists to invent new words for this process. "silicide, damascene copper contacts, and advanced activation techniques." seemed far to cool to saddle with the brand- name of the new "Blubberon(TM)" and "Humpderon(TM) processor line.

You need to think before mouthing off in ignorance.

Silicides are silicon based compounds, eg Copper Silicide, Cu_5 S. The high purity of the Si used by IBM etc means that the formation of Silicides in their samples is unlikely to come from impurities in the wafers (Fe, Co, Ni and other transition metals are generally the worst offenders). So they are most likely to form at Si-stack interfaces after annealing (essentially baking) their samples (chips).

Damascene copper is contacts are small interconnects made in multi-step stages.
1.There's a lithography step (patterning & chemical wet-etch) to make trenches for the copper connects.
2.Followed by either electrochemical deposition, or sputtering of the copper.
3.Finally after an etch/polishing step you have your connects.

"advanced activation techniques" refers to modifying the surface of the silicon wafer, and/or deposited layers on the silicon to increase deposition rate, and current efficiency. In the case of electrodeposition, you need to aim for a current efficiency of more than 10% (as in, for a given applied potential, measured current/charge, how much metal has been deposited compared to what you would expect). An electrochemist working in industry would be able to give a much more accurate value than this.

It's all a lot more complicated than this, and optimising each step is a painstaking process, and yes IAAPBOWIMSNSP (I am a physicist, but one working in magnetic systems not semiconductor physics), but that is the general gist of it.

Re:IBM and AMD (1)

vsny (1213632) | more than 5 years ago | (#24665687)

I could not follow your explanation of "advanced activation techniques".

I took that to mean activation of dopants for very thin channels.

Re:IBM and AMD (3, Interesting)

Bender_ (179208) | more than 5 years ago | (#24666133)

Almost...

Silicides are used to create low resistivity contacts to doped silicon. Typically a metal is deposited on the wafer surface and then heated to react with the crystalline substrate to form the silicide. Commonly used silicides are NiSi, CoSi and TiSi.

You got the copper right. The here appears to be that they are using copper down to the silicon substrate. Copper does easily "poison" the electrically active regions and is hence typically only used in higher level wiring layers. Getting it down to the silicon is challenging.

The advanced activation techniques refer to thermal processing steps that are used to incorporporate N and P dopants into the crystal lattice. The challenge here is to heat the wafer to above 1000C within seconds. IBM is probably a laser or flash lamp process for this.

Re:IBM and AMD (2, Funny)

vsny (1213632) | more than 5 years ago | (#24668699)

Thank you, that makes more sense.

However, isn't a flash lamp (RTA) the standard process?

Re:IBM and AMD (1)

Bender_ (179208) | more than 5 years ago | (#24686131)

Normal RTA uses halogen lamps with relatively slow ramp rates and process times in seconds to minutes. FLA operates in the millesecond regime - fast enough to heat only the wafer surface.

Re:IBM and AMD (1)

pilgrim23 (716938) | more than 5 years ago | (#24669283)

methinks you take a joke to seriously. Getting out of the bunny suit sometime might be instructive...

Re:IBM and AMD (-1, Troll)

Anonymous Coward | more than 5 years ago | (#24664597)

The Niggers wanna tell you what to take. Me and the boys are gonna be around your place 'round 8. Gonna have a all night shower time party and guess what honkey, you be the bitch. Bring your tears cause Big Shaquawn loves it when bitches cry.

Signed,
The Niggers

Re:IBM and AMD (0)

Anonymous Coward | more than 5 years ago | (#24664903)

Wait, I already marked the occasion down for 9, as per the comment in the other story. If you really want me to show up, at least decide upon a time.

P.S. Where do I RSVP?

Re:IBM and AMD (-1, Troll)

Anonymous Coward | more than 5 years ago | (#24664979)

You know what I love?

A good sized glass of Nig Nog at Christmas!

Re:IBM and AMD (0, Offtopic)

WgT2 (591074) | more than 5 years ago | (#24665713)

Hatred is murder.

You're a murderer.

Re:IBM and AMD (0)

Anonymous Coward | more than 5 years ago | (#24668567)

Whata Goat Take 2 fag queen of drama.

Re:IBM and AMD (1)

Surt (22457) | more than 5 years ago | (#24665919)

I always wonder with these posts, are they clever white racist propaganda implying that all black guys are gay, or clever black racist propaganda implying that white racists are all idiots, or stupid black racist propaganda implying that white people should be afraid of gay black men?

Re:IBM and AMD (1)

LoweD (1346949) | more than 5 years ago | (#24667169)

Shaquawn, it's after nine, and you guys still haven't shown up! You promised!

*sigh*

Re:IBM and AMD (0)

Anonymous Coward | more than 5 years ago | (#24664917)

STMicroelectronics is Intel. As much as I hate to say it.

Re:IBM and AMD (1)

jeremypv (455256) | more than 5 years ago | (#24665279)

No, STMicroelectronics + Intel = Numonyx

Re:IBM and AMD (1)

timeOday (582209) | more than 5 years ago | (#24669563)

IBM seems amazingly successful at innovative fabrication techniques given that their business model leans more on business consulting services. Compared to Intel do they really make that many chips? I've never bought a IBM RAM stick that I know of. There can't be that many POWER supercomputers going out the door. (Granted, there is the PS3 Cell).

Re:IBM and AMD (1)

Sj0 (472011) | more than 5 years ago | (#24673991)

Who cares if you're selling 10,000 instead of 1,000,000 if you're making 1000 times the profit?

cool (2, Insightful)

Anonymous Coward | more than 5 years ago | (#24664469)

now if AMD could get their 45nm yeild above, say, zero percent, they'd be rockin!

When will it stop? (4, Interesting)

4D6963 (933028) | more than 5 years ago | (#24664473)

22 nm?? Aren't we dramatically approaching the theoretical limit? What is the theoretical limit by the way?

Re:When will it stop? (5, Interesting)

TheMeuge (645043) | more than 5 years ago | (#24664557)

Well, a single silicon atom has a radius of 110pm. I assume silicon dioxide molecule is ~500pm, which is something like 40X smaller than the 22nm process.

However, silicone dioxide is not perfectly stable and can "leak", as far as I understand it, which limits the process somewhat.

Again, assuming you need something 100X larger area-wise, you're looking at maybe a factor of 4X remaining until the process can't be shrunk any further.

But I am not an engineer.

Re:When will it stop? (4, Interesting)

x2A (858210) | more than 5 years ago | (#24665267)

I think the limits we're hitting at the moment are not so much due to the material we're cutting into, but the light we're using to do so. To cut finer we need narrower wavelength (=higher energy) light. We're already hitting the very high end of the ultra-violet spectrum (around 10nm) and approaching x-ray light. As the wavelength decreases, all sorts of other things start to change. Materials the used to reflect the light now start letting photons through, lenses no longer have any effect etc, so new ways have to be found to control light at higher frequencies.

But even here there are ideas to get around the problems, such as using quantum effects like creating interference patterns (I believe I read recently, but don't quote me on it) to cut details finer than the wavelength of the light.

Re:When will it stop? (1)

kesuki (321456) | more than 5 years ago | (#24667381)

Finally! a use for Xasers http://en.wikipedia.org/wiki/Maser#Terminology [wikipedia.org]

seriously though, lithography is running into problems working at the scale we're already at, much less at 22nm, but 'lasers' can correct lithography errors to a much higher detail than even 22 nm parts. i think there are going to a be lot of laser corrective surgery on microprocessors to allow the die to keep shrinking.

Re:When will it stop? (1)

Ginger Unicorn (952287) | more than 5 years ago | (#24671505)

Apparently Metamaterials with negative refractive indexes offer a potential way to focus existing wavelengths of light beyond their diffraction limit, so that we might be able to have finer lithography without decreasing the wavelength of light used.

Re:When will it stop? (3, Informative)

blind biker (1066130) | more than 5 years ago | (#24665311)

I don't mean to be offensive, but almost all those numbers are just pulled from your ass (and I am sure you'll agree).

For the record, today exist technologies for depositing atomic monolayers of various oxides and even elements. Also, if you think of it, CNTs are nothing more than graphene cylinders - therefore, a carbon atom monolayer.

Furthermore, CMOS transistors with 17nm long gates have been fabricated already in the distant 2006. Planar CMOS with gates of 15nm have been fabricated in "prehistoric" 2001! And if you think that is impressive, check out this article from the even more distant past [aip.org]

So, 22nm is far from a physical limit, which is a statement easily demonstrated - by historical events, so to say.

Re:Good guess (1)

TheMeuge (645043) | more than 5 years ago | (#24673013)

I did pull them out of my ass. I do, however, have a gift for making up numbers that turn out to be right.

All you really need is a factual number to start from, a large pool of general knowledge, and some common sense... and usually you can guestimate to within one order of magnitude or... within a log2 of the answer, as I did.

Don't be intimidated by numbers.

Re:When will it stop? (1)

Ant P. (974313) | more than 5 years ago | (#24682387)

The problem with current techniques for turning carbon into nanotubes is that they're about as controllable as creating glass by striking sand with a few hundred kV.

Re:When will it stop? (3, Insightful)

delibes (303485) | more than 5 years ago | (#24665383)

I did study electronic engineering, but it was 14 years ago and I'm not sure my answer's much better ...

A popular on-line encyclopaedia says that Silicon has a Van der Waals radius (the size if we pretend the atom is a solid sphere) of 210pm - over 100 times less than the 22nm process. If you also count the need to dope the silicon p-type or n-type, grow layers of insulator like silicon dioxide and avoid quantum stuff that I never really understood, then I'd guess at a lower limit of around 25 or so atoms for a workable structure. Let's call it 5nm - hey that's a factor of 4x less than 22nm like you said!

From a different point of view, I've seen papers by groups who have been fabricating structures at the sub-10nm region. Again, perhaps it can be pushed to 5nm.

Beyond that we'll need to think about alternatives - making electrons move faster, like strained silicon does, or giving up silicon for something like diamond (so we can have super-computer bling :)

If the silicon process shrinks every 2-3 years, we'll hit the limit about 10 years. But they said that 10 years ago too!

Re:When will it stop? (2, Interesting)

iris-n (1276146) | more than 5 years ago | (#24666061)

This "quantum stuff" you talk about is probably tunnelling, which will make electrons leak the transistors if they are too small.

The exact distance is hard to tell, but in my STM I use around 10 angstroms (fuck ASCII), to get a sizeable current through a potential wall. So, I bet that 20 angstroms would suffice to make it negligible, and so, accounting for other instabilities, I would agree with parent in 5 nm.

Re:When will it stop? (0)

Anonymous Coward | more than 5 years ago | (#24666961)

A popular on-line encyclopaedia says that Silicon has a Van der Waals radius (the size if we pretend the atom is a solid sphere) of 210pm - over 100 times less than the 22nm process.

Britannica? Can't be. World Book? Hmm... no wait! Encarta. Yeah, that's right.

CRAP!! (0)

Anonymous Coward | more than 5 years ago | (#24670417)

Then I'll have to start optimising teh codes!*

http://www.burnttoys.net/cv

*Would be funnier if it weren't so true

Re:When will it stop? (1)

Sj0 (472011) | more than 5 years ago | (#24674153)

Yes, if there's one lesson to be learned from electronic engineering, it's this: It's all fun and games until someone brings up Quantum Physics.

I became so disillusioned when I learned about tunneler diodes. I thought I was safe from that quantum physics crap.

Re:When will it stop? (1)

vsny (1213632) | more than 5 years ago | (#24665649)

There is probably no SiO2 under the gates. They say high-K which is either SiON or HfO2. The gate dielectric is much thicker than the equivalent SiO2 gate dielectric. Of course it is still thin, and still prone to leakage.

Here is where it'll stop (1)

celtic_hackr (579828) | more than 5 years ago | (#24669755)

I'm not an engineer, although I studied it. I'm a physicist by training.

You'll not see anything in the 3nm scale on a desktop. It would burn itself up from the heat given off by the electrical energy. The absolute minimum if you find a solution to the heating is 1.5nm. They still have a ways to go. This limit is because you have to have a certain size well to extract electrons from to produce current

If you go the route of using carbon nanotubes you're still going to hit a 1-2nm limit.
So 1.5nm is the end of the road, but I have doubts we'll ever see anything smaller than 5nm.

I wouldn't want a chip at this density. I'm not sure you could build a stable chip circuit at 5nm. It would be very susceptible to cosmic radiation, and you'd need to add a lot of redundancy in to ensure no data loss. So you wind up making it bigger again to deal with the inevitable data corruption. We're already in the danger zone for data corruption due to such things as sunspot activity. I think a lot of scientists and researchers are in denial.

So the limit is officially 1.5nm, but I'm betting we'll never go below 10. There comes a point where extracting that last 5% has to be traded off for other realities. I'll be surprised if we have 10 years till we hit the wall.

Re:When will it stop? (1)

Epi-man (59145) | more than 5 years ago | (#24674801)

Well, a single silicon atom has a radius of 110pm.

I'm surprised no one has pointed this out yet, but the radius of the atom isn't as critical as the spacing of the atoms in the crystal. For crystalline silicon, you are looking at a spacing between atoms of around 543 pm (why pm? Most people talk about Angstroms at this level?), or about 40 atoms under the gate, of course the channel is smaller than the gate area due to sub-diffusion of the source and drain regions during processing...I miss device engineering.

(yes, I am a device physicist)

Re:When will it stop? (4, Informative)

wizardforce (1005805) | more than 5 years ago | (#24664689)

Aren't we dramatically approaching the theoretical limit?

yes.

What is the theoretical limit by the way?

for Silicon it's probably around 10nm or so. as for what is thought to be possible, molecule size components measuring a few nm.

Re:When will it stop? (2, Insightful)

rahvin112 (446269) | more than 5 years ago | (#24664905)

Assuming of course that there is no advance in technology.

I remember when they said 90nm was the limit of lithography. All the limits fall as there is a massive amount of money going into systems and methods to cheat the "limit". The real physical limit is a single atom width, at that point you can't go smaller, assuming there is a limit other than that single qualifier is dishonest because as with most of the other limits we have found ways to engineer around the "limit". Even if you think there is no way we could possibly have single atom paths you aren't considering the engineering advancement that could make such a thing possible including the use of materials other than silicon.

Re:When will it stop? (0)

Anonymous Coward | more than 5 years ago | (#24665179)

The lattice constant for silicon is about 0.5nm which means at this size the 'wires' will be less than 20 molecules across leading to substantial leakage. To go smaller will take nanotechnology (perhaps carbon nanotubes)

Re:When will it stop? (3, Funny)

jeremypv (455256) | more than 5 years ago | (#24665305)

To go smaller will take nanotechnology (perhaps carbon nanotubes)

that's the only time we can say that the internet goes to a series of tubes

Re:When will it stop? (1)

Surt (22457) | more than 5 years ago | (#24665971)

How many times does it have to be said: The internet is, in fact, largely composed of a series of tubes containing copper wires and fiber optic cables. Ted Stevens may be an evil idiot, and may have fundamentally misunderstood what the internet is, but his statement was not factually incorrect.

Re:When will it stop? (1)

mapsjanhere (1130359) | more than 5 years ago | (#24665773)

There is no theoretical limit on lithography (or at least not anywhere near these dimensions). It becomes harder and harder, but you will run into the limit of the insulation powers of your dielectric material much earlier.
Think of the potential as a hill. The narrower it gets, the lower it gets too. So at some point the electron does not see any real barrier in your silicon dioxide anymore. In addition to the classic explanation, you also run into a quantum mechanical one involving tunneling. Even if you use a different insulator with a steeper hill, over short distances the electron can tunnel through your potential. So even if you switch e. g. to diamond, you will not go much below the 10 nm level before the system breaks down.
As for nanotubes, the dimensions of a nanotube are on the same order of magnitude (1 nm for single wall), and you still need the insulating layer to avoid your electron jumping from adjacent tubes and shortening out your device.

Re:When will it stop? (1)

rahvin112 (446269) | more than 5 years ago | (#24679727)

Current understanding of quantum mechanics is likely extremely limited. When it starts to be a serious issue with IC's much much more research will be done into tunneling and ways to avoid it. You are falling into the trap of thinking that because we don't have the technology or understanding now, that we never will. To say that because of our understanding right now we will never achieve something is not correct. I point simply to those that said we would never break the sound barrier. Our knowledge continues to grow and I'm not going to discount the possibility that they find a way to work around or nullify the quantum level effects introduced at that process level.

Re:When will it stop? (1)

mapsjanhere (1130359) | more than 5 years ago | (#24679877)

While you're at it, can I interest you in this new process to convert lead into gold? New technology enables us to get around those pesky fundamental properties of matter.

Re:When will it stop? (1)

rocker_wannabe (673157) | more than 5 years ago | (#24666447)

So at what scale does the background radiation of the Earth damage the device shortly after its produced? Are production CPUs commonly protected from normal radiation exposures now?

Re:When will it stop? (1)

Whiteox (919863) | more than 5 years ago | (#24668747)

I'm not sure of background radiation, but something like a cell phone sim card can be EM 'bombed' easily enough by wireless modems and the like. Be warned!
Sufficient EM energy will wipe out most electronics. Now if your computer lives in a Faraday cage, it may just survive.

Re:When will it stop? (2, Informative)

cyfer2000 (548592) | more than 5 years ago | (#24664831)

22nm could be the limit of bulk planar CMOS device, next step maybe 16nm finFET. See this [solid-state.com] for more information.

Re:When will it stop? (2, Funny)

Intron (870560) | more than 5 years ago | (#24664987)

Yes. At 5E-09 Volkswagens we are indeed close to the limit which is one nano-wagen (nVW).

The limiting factor these days is the ability to form the circuit designer's personal logo out of individual copper atoms, however advances in X-ray lithography may reduce that limit.

Re:When will it stop? (0)

Anonymous Coward | more than 5 years ago | (#24665439)

The theoretical limit has been broken many times over.

The first theoretical limit was broken when features were imaged smaller than the wavelength of light used to create the features. We are currently resolving ~45 nm lines using 193 nm light. This has been made possible by using immersion lithography (using water or other high refractive index materials to shrink the light) among other tricks such as double patterning (using two lithographic passes where the line size is a quarter of the pitch, the line plus space).

Thanks to the ingenuity of lithographic engineers the theoretical limit was then pushed to the thickness of the dielectric layer used to insulate the field effect from the gate. Silicon Dioxide has been the insulator of choice for generations, however field scaling has decreased this to thicknesses where quantum tunneling has become the major issue. This has given way to high-k dielectric materials such as Hafnium Dioxide, where thicker layers can be used to achieve the same capacitive effect.

Re:When will it stop? (1)

jessedorland (1320611) | more than 5 years ago | (#24665909)

Speed wise we already have reached the barrier. Four years ago Intel promised us that they would produce 10ghz single core cpu. As of 2008 they can't even produce 5ghz duel core cpu -- each core 5ghz. One of the reason AMD & Intel star labeling their cpu with names rather number was due to speed barrier.

Re:When will it stop? (1)

Surt (22457) | more than 5 years ago | (#24666691)

http://en.wikipedia.org/wiki/Atomic_radius [wikipedia.org]
http://en.wikipedia.org/wiki/Carbon [wikipedia.org]

The atomic radius of the smallest solid is carbon at ~65pm. So 22nm = 22000 pm / 65pm = 338X improvement remaining.

As a physical limit, it is hard to see how a computer could be manufactured that used less than one atom per circuit. It is probably not realistic to expect that we will get close to that. In any case, even if we reach single-atom transistors, going beyond that will be a tremendous challenge.

So, at 2 years per halving of feature size, Moore's law has less than 2 decades of life left, barring bizarre physics discoveries.

Remember (5, Funny)

Anonymous Coward | more than 5 years ago | (#24664511)

apple uses intel processors so we should hate amd and ibm.

Re:Remember (5, Funny)

x2A (858210) | more than 5 years ago | (#24664793)

But IBM put money into linux/oss development (*cheers*) and they fought SCO (*boo's*) who hate so that makes them good... but they also built machines for the nazi's (*boo*) but cuz of the whole nazi thing we have Fanta (*...erm... do we like fanta?*). AMD + ATI = open source graphics drivers (*yay*) but Intel = open source graphics drivers all by themselves (*bigger yay*). IBM, even if they did get shat on during the process, are kinda responsible for putting MS (*smashes bottle and puts broken sharp pieces to its neck*) where it is now.

Erk... I think I'm going to need to have to create some kinda graphical relationship manager for this one, create a love/hate score for everyone involved, in the same way Google create pageranks, and I'll get back to you on whether we do in fact love or hate IBM or not. Stand by...

Re:Remember (-1, Troll)

Anonymous Coward | more than 5 years ago | (#24665247)

finished wanking?

Re:Remember (1)

x2A (858210) | more than 5 years ago | (#24665299)

yeah right, like I'm gonna be able to type from beyond the grave.

Re:Remember (1)

Gilmoure (18428) | more than 5 years ago | (#24665255)

Ven diagram [dieselsweeties.com] for the win!

Re:Remember (1)

badboy_tw2002 (524611) | more than 5 years ago | (#24664847)

But the Holy Wii uses PowerPC! ...

SLASHBOT SEGFAULT

Re:Remember (1)

edalytical (671270) | more than 5 years ago | (#24668249)

There is no system but Wii and Mote is one of its inputs. It's true that the xbox 3 sixes is the system of the beast. And in Sony land blu-ray roots your mom in the format wars. HAL is the POWER that drives the systems universe, it controls the Cell, the Tri-Core Xenon and most importantly the Broadway. Protect this secret for this knowledge will surely crash bots of thy slash.

In case you're wondering why SRAM... (5, Informative)

Anonymous Coward | more than 5 years ago | (#24664563)

New manufacturing processes are typically tested by producing SRAM cells, because they're a relatively typical structure and big arrays of SRAM cells are easily tested to measure the defect rate.

Re:In case you're wondering why SRAM... (2, Informative)

warrior (15708) | more than 5 years ago | (#24669271)

They're also usually made from _the_ smallest transistors on the die for density reasons. Aside from being able to print these features you also need to reliably set the threshold voltages of all the transistors to make a cell that is both writeable and read-stable. This is not easy to do. For the FET sizes involved in this cell you're probably looking at only tens of dopant atoms setting the Vt. It only takes a few more or a few less dopants to really shift the Vt of said device which could push it into a point where you either can't write the SRAM cell or it flips when you try to read it. Once a process is reliably yielding good SRAMs it's usually "ready to go".

FFS! (4, Funny)

ZarathustraDK (1291688) | more than 5 years ago | (#24664663)

The more I pay the less I get! What have the world come to?

Re:FFS! (1)

x2A (858210) | more than 5 years ago | (#24664833)

Smaller portions yep, but many many more courses :-)

Penis Enhancement Surgery (0)

Anonymous Coward | more than 5 years ago | (#24664849)

It's still a marked improvement on what was there before though, you have to admit! ;)

Srsslsysyly, this is a good step for IBM and Friends(tm) but what actually matters is releasing stuff eventually. On the other hand, I don't think AMD have even demonstrated a 32nm SRAM yet, so skipping to 22nm is quite a feat.

Re:FFS! (0)

Anonymous Coward | more than 5 years ago | (#24664853)

I guess IBM and AMD have been taken over by the RIAA.

This is amazing! (1, Informative)

Anonymous Coward | more than 5 years ago | (#24664777)

IBM says that the cell's development involves.. high-NA immersion lithography, high-K metal gate stacks, extremely thin silicide, damascene copper contacts, and advanced activation techniques."

Wow! That's how my shampoo works too!

I wonder if the SRAM tingles too...?

Re:This is amazing! (1)

Yvan256 (722131) | more than 5 years ago | (#24664881)

Nope, but it's got electrolytes! It's what plants crave!

Lost in translation. (1)

Fumus (1258966) | more than 5 years ago | (#24665425)

I just love these new technology names.
First CUDA ("wonders" in Polish), now SRAM which means "I shit" in Polish.

BTW: Did you know what SRAM means in Polish? (0)

Anonymous Coward | more than 5 years ago | (#24665449)

"Sram" in Polish means "I shit" (verb)

Re:BTW: Did you know what SRAM means in Polish? (1)

Whiteox (919863) | more than 5 years ago | (#24668707)

Can you conjugate that for us?

A: Minimum transistor size (0)

Anonymous Coward | more than 5 years ago | (#24667419)

Too all the guys asking what the theoretical minimum transistor size is. From what i remember reading on wikipedia the node sizes are as follows.

45 nm
32 nm
22 nm
12 nm

so the smallest transistors will be 12 nm. However, since then i read some article where intel said it would do 10 nm transistors.

12 nm is expected to be reached by 2012 according to intel and 2018 according to an independent study.

You know you need sleep when... (1)

mark-t (151149) | more than 5 years ago | (#24667421)

I misread part of the summary as "...a SRAM cell built on a 22nm fornication process."

(Insert numerous male enhancement spamvertisements here)

Re:You know you need sleep when... (1)

the_germ (146623) | more than 5 years ago | (#24669237)

Oh, I read the headline as: IBM and AMD Create First 22nm _SPAM_ Cell

As if we didn't have enough of it already...

Not bad, but.... (1)

Whiteox (919863) | more than 5 years ago | (#24668669)

I'm still hanging out for the 8 nm version.

0.1um2 is huge (0)

Anonymous Coward | more than 5 years ago | (#24670501)

can someone give the true area? The quoted area (one square meter divided by 10 000 000) is so HUGE, I can land an airplane on it.
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