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100x Denser Chips Possible With Plasmonic Nanolithography

timothy posted more than 5 years ago | from the powers-of-10-are-nice dept.

Data Storage 117

Roland Piquepaille writes "According to the semiconductor industry, maskless nanolithography is a flexible nanofabrication technique which suffers from low throughput. But now, engineers at the University of California at Berkeley have developed a new approach that involves 'flying' an array of plasmonic lenses just 20 nanometers above a rotating surface, it is possible to increase throughput by several orders of magnitude. The 'flying head' they've created looks like the stylus on the arm of an old-fashioned LP turntable. With this technique, the researchers were able to create line patterns only 80 nanometers wide at speeds up to 12 meters per second. The lead researcher said that by using 'this plasmonic nanolithography, we will be able to make current microprocessors more than 10 times smaller, but far more powerful' and that 'it could lead to ultra-high density disks that can hold 10 to 100 times more data than today's disks.'"

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117 comments

dense? (5, Funny)

chibiace (898665) | more than 5 years ago | (#25520219)

what ever happened to smart chips?

that's great and all. (2, Insightful)

DragonTHC (208439) | more than 5 years ago | (#25520235)

The problem is this: when will it be cheap enough to be used as a process for the chips we use now?

5-10 years (4, Funny)

wjh31 (1372867) | more than 5 years ago | (#25520265)

every great new technology is 5-10 years away i belive

Re:5-10 years (4, Funny)

Klaus_1250 (987230) | more than 5 years ago | (#25520515)

Except for nuclear fusion, that always 30 years away.

Re:5-10 years (2, Informative)

Klaus_1250 (987230) | more than 5 years ago | (#25520553)

Arg, ... need to preview. nuclear fusion power-generation, that is.

Re:5-10 years (4, Funny)

rubycodez (864176) | more than 5 years ago | (#25521031)

very good news for you, electricity by fusion is no longer something promised 30 years away, now it's fifty.

Re:5-10 years (2, Interesting)

cong06 (1000177) | more than 5 years ago | (#25521535)

And artificial intelligence. That's always 20 years away.

Re:5-10 years (4, Insightful)

Pantero Blanco (792776) | more than 5 years ago | (#25522031)

And artificial intelligence. That's always 20 years away.

No, it starts off at 20 years away and gets closer, and once it's less than 5 or 10 years away, someone redefines it and it's back to 20.

Re:5-10 years (0)

Anonymous Coward | more than 5 years ago | (#25529579)

No, the AI researchers finally got humility and admitted that level 1 and 2 problems are hard, and that they have no idea how close we are to cracking them.

Viable fusion isn't going to come from tokamak style reactors. Dead end path. Some other path may work, polywell, focus fusion, inertial confinement, etc.

Re:5-10 years (2, Funny)

Ortega-Starfire (930563) | more than 5 years ago | (#25521895)

They better hurry up, for about a century we've been told we'll run out of oil in 20 years.

Re:5-10 years (2, Funny)

Fluffeh (1273756) | more than 5 years ago | (#25521909)

And I thought it was already here. While reading TFA I couldn't help but think. Wow, that's dense. That's really dense. Surely nothing could be that dense short of Microsoft programmers?

Yeah, look, sorry it's early and that's the best I got at the moment. Live it up!

Re:5-10 years (1)

Tawnos (1030370) | more than 5 years ago | (#25523323)

I don't get it. Maybe I'm not supposed to, though, since I'm a Microsoft programmer and I see you mentioned those.

Space elevators (5, Informative)

Hal XP (807364) | more than 5 years ago | (#25522187)

Don't forget the space elevator, which, according to the late Arthur C. Clarke will get built 50 years after [nasa.gov] it stops getting modded funny.

Re:Space elevators (2, Funny)

Klaus_1250 (987230) | more than 5 years ago | (#25522427)

^^ DO NOT mod parent funny! (and that includes Neo-Luddites, trying to be funny) ^^

Re:5-10 years (1)

Ihmhi (1206036) | more than 5 years ago | (#25523019)

So according to both of your estimates, great nuclear fusion is 35-40 years away. Of course, 30 years from now, we'll have mediocre nuclear fusion.

Re:5-10 years (1)

elashish14 (1302231) | more than 5 years ago | (#25523505)

30 years? Pfft, that's nothing compared to the year of the Linux desktop.

Re:5-10 years (1)

sexconker (1179573) | more than 5 years ago | (#25530141)

Which is just in time for Duke Nukem: Forever.

30 years for hydrogen infrastructure (1)

danwat1234 (942579) | more than 5 years ago | (#25523819)

30 years to develop a hydrogen infrastructure. Go Chevy Volt etcetera .

Re:5-10 years (1)

master_p (608214) | more than 5 years ago | (#25525539)

And DNF...

Re:that's great and all. (1)

ChienAndalu (1293930) | more than 5 years ago | (#25520293)

Well, think about it this way: They have to build one or a few really expensive machines, and they obviously don't need much resources. So the mass production effect will push the price down after a while.

Re:that's great and all. (0)

Anonymous Coward | more than 5 years ago | (#25521229)

rtfa

Re:that's great and all. (0, Offtopic)

Corwn of Amber (802933) | more than 5 years ago | (#25526399)

Never. "Plasmonic Nanolithography"? Yeah, yeah, and I've got a machine that extracts OIL from SNAKES while producing more energy than it consumes.

When will they fire Roland? He never even posted anything remotely plausible.

Fragility (4, Interesting)

Renraku (518261) | more than 5 years ago | (#25520267)

A question for the physics people out there.

At what point does Brownian motion become a serious consideration? What about tunneling electrons and other quantum-ish effects?

Re:Fragility (5, Informative)

wjh31 (1372867) | more than 5 years ago | (#25520319)

brownian motion isnt really relevant at this level, but i imagine that if the channel or 'wires' or whatever were close enough then tunneling could be an issue, but probability of tunneling falls off exponentially with the distance, and the severity depends on the energy, but if the wires are put close enough then it could be an issue, however only if there was just few atoms between channels

That's kinda the whole point (2, Interesting)

Moraelin (679338) | more than 5 years ago | (#25520719)

Well, that's kinda the whole point. Given that today's transistors are 45nm or so, 10 times smaller would be 4.5nm, or about 15 silicon atoms IIRC. I think we can worry about that already.

Re:That's kinda the whole point (0)

Anonymous Coward | more than 5 years ago | (#25521081)

If you consider the area instead, you could fit the same number of transistors that in current chips with a die size of only 45nm/sqrt(10) = 14.3 nm, so that would be 45 atoms.

Tunneling/Quantum effects: ~10nm (3, Informative)

GanjaManja (946130) | more than 5 years ago | (#25523865)

the researchers that make 200-400GHz transistors today DO in fact worry very much about tunneling. (I'm thinking of InP/InGaAsP transistors)

Quantum wells are around 5-10nm wide, so anything approaching ~20nm would at least have to account for that sort of quantum effect. So density may have a difficult limit to breach, but smaller lithography certainly makes high speed transistors easier to implement on CMOS.

(EE, not physics)

Re:Fragility (5, Interesting)

mehtars (655511) | more than 5 years ago | (#25520713)

Actually with processors using a 90 and 45 nanometer transistor size, there is a very high likely hood that a number of transistors will fail over the lifetime of the chip due to diffusion alone. Though modern processors have taken care of this by routing data through parts of the chip that are still active. Though this has an interesting affect of slowing the processor down as it gets older.

Re:Fragility (1, Interesting)

ThisNukes4u (752508) | more than 5 years ago | (#25520985)

Do you have any source/references on techniques used to compensate for this effect?

Re:Fragility (5, Informative)

mehtars (655511) | more than 5 years ago | (#25521421)

http://www.extremetech.com/article2/0,1697,1994121,00.asp [extremetech.com]
Here is an article on it. Although its from 2006, there has been more work done on it. There are more articles on it in the literature.
If you search for 'self healing' microprocessors you can find a number of articles on it.

Re:Fragility (0)

Anonymous Coward | more than 5 years ago | (#25521763)

Why was parent marked troll? Off topic, maybe, but it does sound interesting?

Re:Fragility (0)

Anonymous Coward | more than 5 years ago | (#25522021)

./ needs a moderating system for moderatings. Call it,
          The Meta-Moderating System (c),
        the only system which successfully
          compensates stupid and bizarre
                moderatings, since 2008.

Re:Fragility (2, Insightful)

Zerth (26112) | more than 5 years ago | (#25522087)

So bit rot is real now? Argh.

Well, at least I can put it back on the excuse calendar.

Not true (1, Informative)

Anonymous Coward | more than 5 years ago | (#25522965)

This is completely untrue, if a transistor fails on a CPU, that's it, there's no routing around the damage as you seem to imply.

If you'd actually read the article you referenced when queried by someone else, you'd see that was a three year study initiated in 2006, so even if that study bears fruit it'd be 5-10 years at least before it showed up in the CPUs you buy from Intel or AMD.

Re:Fragility (4, Insightful)

Cyberax (705495) | more than 5 years ago | (#25520721)

At about 5nm. Other effects should limit our current tech to about 10nm.

If "10 times smaller" is about chip area, then it might be possible - square root of 10 is about 3 and our current best lithography processes are about 30nm.

Re:Fragility (3, Informative)

drerwk (695572) | more than 5 years ago | (#25520757)

I tend to think of Brownian motion happening in a gas or liquid - which Wikipedia confirms http://en.wikipedia.org/wiki/Brownian_motion [wikipedia.org]
Thermal diffusion of atoms in a device do cause problems and limit the temperature at which semiconductors can work. In fact, diffusion of dopants is one way a chip can 'wear out' with long term use. No doubt the smaller the scale the more problem diffusion will be, but it tends to be very temperature sensitive, so keeping the device at some reasonable temperature would prevent, or at least slow the problem.

Re:Fragility (5, Informative)

Gibbs-Duhem (1058152) | more than 5 years ago | (#25521125)

Tunneling electrons and other quantum effects are already in effect in current devices. We just design around those effects instead of taking advantage of them currently. When we really get the ability to make reliable 5nm size scale parts, we'll just switch to quantum dot based transistors (single electron transistors).

Brownian motion isn't relevent here.

A big issue is that sharp features are thermodynamically unstable (lots of dangling surface bonds), so edges tend to "soften" over time due to surface diffusion. Also, at ohmic contacts you can get pits forming which can eventually degrade features.

Another issue is that at the size scales we're talking about, current insulators stop working. They're looking at switching to a variety of new materials for this purpose (for example, IrO2), but these are tricky. This is what they mean when they say "high dielectric constant" materials. Every MOS transistors has a this oxide layer (between the Metal and the Semiconductor), and that layer's thickness defines many of the physical properties of the device.

Finally, you have to worry about inductors to a lesser extent. Current inductors aren't quite good enough, but we're working on that too =) Nanoscale metallic alloys are definitely the way to go.

In any event, this article is sort of sensationalist (surprise!). I was able to make 20nm features using physical embossing (stamping metal liquid precursors with a plastic stamp and then curing them) back in 2002. Making features of small size scale is easy, it's keeping error rate, making interconnects, etc that's hard and annoying. Plasmonics is very neat though, I can imagine it working with time.

Besides, hard disks already have magnetic domains of ~ only a few nanometers anyway.

Re:Fragility (1)

blues_shuffle (921429) | more than 5 years ago | (#25523351)

Finally, you have to worry about inductors to a lesser extent. Current inductors aren't quite good enough, but we're working on that too =) Nanoscale metallic alloys are definitely the way to go.

Now my experience with electronics is quite brief at best, but I was under the impression that inductors were specifically avoided in electronic circuitry for a number of reasons, not the least of which is that they tend to be bulky. This is not a big problem because the effects of an inductor can be simulated with an RC circuit.
Is this a typo, or is there some reason why they use inductors on nano-scale circuits (where the size issue would be even more pronounced)?

Re:Fragility (2, Funny)

Jafafa Hots (580169) | more than 5 years ago | (#25524381)

Plasmonics is very neat though...

It's also a great name for a band.

Re:Fragility (1)

ciderVisor (1318765) | more than 5 years ago | (#25524701)

Hell, it's a great phrase to drop into any conversation. I'm currently on the lookout for a reason to say "Plasmonic Nanolithography". It's right up there with Flux Capacitor.

Re:Fragility (4, Funny)

ZarathustraDK (1291688) | more than 5 years ago | (#25521241)

A question for the physics people out there. At what point does Brownian motion become a serious consideration? What about tunneling electrons and other quantum-ish effects?

Depends on the fiber-content of the brownie...

Re:Fragility (1)

Muad'Dave (255648) | more than 5 years ago | (#25526327)

At what point does Brownian motion become a serious consideration?

I don't know about you, but after a few footlong chilidogs I take any Brownian motion very seriously.

Plasmonic nanolithography? (0)

Anonymous Coward | more than 5 years ago | (#25520273)

This is Roland at his finest...

Re:Plasmonic nanolithography? (3, Insightful)

Valdrax (32670) | more than 5 years ago | (#25520769)

What exactly is the problem with this term? Just too "fancy" and "technical" for you salt of the earth Anonymous Cowards? It makes perfect sense if you know the root words for it, and it succinctly describes the technology:

- Plasmonic: Of or using plasmons. [wikipedia.org]
- Nano-: At the nanometer scale of operation
- Lithography: Lithography [wikipedia.org] .

Maybe you can argue that the "nano" is superfluous, but it captures one of the two things that are significant about the new technique -- it uses plasmons instead of traditional light, and it can theoretically operate at a scale as small as 5-10 nm. ("Nano-" seems to be more significant, when you're at the point where you're talking single-digit nanometer resolution.)

Just because it's long and wordy doesn't mean that it's Star Trek nonsense. The phrase has a useful meaning.

Re:Plasmonic nanolithography? (0)

Anonymous Coward | more than 5 years ago | (#25520879)

It makes perfect sense if you know the root words for it

Yes, and so does supercalifragilisticexpialidocious [wikipedia.org]

Re:Plasmonic nanolithography? (1)

GanjaManja (946130) | more than 5 years ago | (#25523875)

nanolithography? wtf, i just do *regular* lithography to get 300nm features... no wonder it's such a pain, we need a NANOlithography machine!

it does sounds awesome though, I'd give them money were I an MBA'd suit with no engineering experience!

Re:Plasmonic nanolithography? (1)

trongey (21550) | more than 5 years ago | (#25526149)

I don't even care what it does. Plasmonic nanolithography is just a freaking awesome name for something.

oh no it's roland (0)

Anonymous Coward | more than 5 years ago | (#25520299)

oh no it's roland

endocronic defribulation device (-1, Offtopic)

spandex_panda (1168381) | more than 5 years ago | (#25520301)

I have been waiting for some affordable plasmonic lithography to go with my endocronic defribulation machine. mwa ha ha. Finally my plans of world domination by picoscale subliminal messaging is becoming reality!

That's good... (4, Funny)

kitsunewarlock (971818) | more than 5 years ago | (#25520379)

These thin chips keep breaking off in my salsa.

Re:That's good... (1)

llamaxing (895844) | more than 5 years ago | (#25521947)

In 5 to 10 years [ref. user wjh31], scientists will eventually combines the advantages of today's chips with Chex, which benefit from breaking less easily and becoming soggy less often.

Impact on Big chip manufacturers (3, Interesting)

tylerni7 (944579) | more than 5 years ago | (#25520385)

Do current chip manufacturers like Intel and AMD work on new lithography techniques, or do they focus more on architectural changes?
It seems that they shrink their process at a fairly slow rate, and both companies seem to do it at about the same speed.

Also, if they both have been just advancing the standard techniques using high frequency light to etch all the chips, how easily could they change their manufacturing process over to something radically different?

Seeing chips with 100 times more density would offer incredible benefits for speed and power savings, seeing the recent changes that the 65nm to 45nm process has brought. Hopefully we'll actually be able to see this process being used inside the next 10 years though.

Re:Impact on Big chip manufacturers (5, Informative)

freddy_dreddy (1321567) | more than 5 years ago | (#25520547)

You have to make a difference between Fabs which produce ICs and companies that produce Fab equimpent. Off course they're intertwined but AMD and the likes is an architecture Co, where Companies like ASML drive Fab technology. The "slow rate" is set by industry agreements - milestones - to keep the cost of Fab tech R&D minimal. The shrink step is a factor 2 for surface, resulting in a factor sqrt(2) for feature size. Litho tech companies use this step because the market is not viable for developing Fab tech which takes a different approach: litho is just a fraction in the hundreds of steps it takes to produce an IC. If you were to implement a new Fab litho technique which differs from the roadmap you won't have customers because the technology isn't in sync with the other processes. In other words: this new technology is only viable if the others jump on the bandwagon, so far it's "only" proof of concept. The field of Fab tech R&D is filled with new concepts, but that's just a small part of the story.

Re:Impact on Big chip manufacturers (3, Insightful)

Thing 1 (178996) | more than 5 years ago | (#25522677)

A .sig comment:

"Violence is the last refuge of the incompetent" - Isaac Asimov

I've always had trouble with this quote. "Last refuge" means, basically, "after trying all else, we do this."

Therefore, I would state that violence is the last refuge of the competent, and, generally, the first refuge of the incompetent.

Re:Impact on Big chip manufacturers (1)

freddy_dreddy (1321567) | more than 5 years ago | (#25523079)

Corrected

Re:Impact on Big chip manufacturers (1)

Tweenk (1274968) | more than 5 years ago | (#25527527)

No, no. Obviously you didn't read the Foundation novels.

The quote means that the competent will always find solutions before resorting to violence, because for every possible situation there is an option better than violence. The incompetent can't find any of those options and use force, which is never the optimal solution.

Re:Impact on Big chip manufacturers (0)

Anonymous Coward | more than 5 years ago | (#25527975)

I believe you're misunderstanding the quote. "Last refuge" means that "if everything else doesn't work we do this", violence in this case. Asimov meant that there were other final options such as the economic and religious shutdown of the Foundation series. An incompetent backs every action up with the threat of force as the last resort. A more competent individual such as Salvor Hardin had more sophisticated tools not relying on violence hence it was not his last refuge.

Re:Impact on Big chip manufacturers (1)

sssssss27 (1117705) | more than 5 years ago | (#25520565)

It's my understanding that they work on both. It's really expensive to build the fabs to produce the chip at the smaller process so obviously they are going to profit off the ones they have as long as possible. Last I had heard AMD is one generation behind Intel right now. You can't just shrink a chip down either with the new techniques. Every time you have a process shrink you run into new problems.

Perhaps this will make SSDs competitive now. You can get 4 GB microSD cards these days. If you could get just a 10 fold increase that gives you 40 GB. That would be enough for my entire music collection on my phone. 100 fold increase would allow me to have most of my TV shows and movies as well.

Re:Impact on Big chip manufacturers (1)

Kjella (173770) | more than 5 years ago | (#25520573)

It seems that they shrink their process at a fairly slow rate, and both companies seem to do it at about the same speed.

I have no idea what definition of slow you're using at least. Making a new process work is absurdly complicated and expensive and they usually do it once every four years. By any standard I can think of the computer industry is still moving at breakneck speeds, setting new performance records, creating new device classes and entering new price brackets all the time. For older definitions of supercomputer, you're probably carrying one in your pocket. At this rate, it'll be a little chip under my watch in ten years.

Re:Impact on Big chip manufacturers (1)

mikael (484) | more than 5 years ago | (#25520685)

For older definitions of supercomputer, you're probably carrying one in your pocket. At this rate, it'll be a little chip under my watch in ten years.

You can already get mobile phone watches (CECT M800 and others), which have 2 Gigabytes of memory, have Bluetooth capability and which can both record and play mp3/mp4 files, along with using WAP internet access. There's even a watch with Wi-FI detection built in.

Re:Impact on Big chip manufacturers (1)

sketerpot (454020) | more than 5 years ago | (#25524351)

That's obscene. And in a few years it'll be routine.

Re:Impact on Big chip manufacturers (1)

tylerni7 (944579) | more than 5 years ago | (#25520761)

I don't mean to say slow exactly, but the progression of lithography technology doesn't seem to be moving as fast as other areas are. This could just be because I don't really understand the whole process of photolithograpy-- I understand that it is complicated, but the sizes are decreasing by a constant factor of about 1.4 every 2-3ish years, while we can easily see hard drive density increasing exponentially.
That is why (well maybe a possible reason why) companies have just been making multi-core machines. The lithography technology isn't increasing by huge leaps like it used to, so to counter that, you can just stick more dies in a package.

This technology, on the other hand, says it can create chips 100 times more dense, that just seems like a major leap from the current track record.

Of course it's a complicated process, and both companies are making incredible progress in what a chip can achieve, but the computing power per core hasn't changed that much in the past couple years.

Re:Impact on Big chip manufacturers (4, Informative)

Valdrax (32670) | more than 5 years ago | (#25521093)

Do current chip manufacturers like Intel and AMD work on new lithography techniques, or do they focus more on architectural changes?

Yes. This research was funded by the National Science Foundation, a federal agency, but IBM, Intel, and AMD are all active in process technology research. I can't dig up much in the way of what they're currently researching, but here are a few things I was aware of in the past few years (and some things I dug while looking for them):

  • Intel was researching extreme-ultraviolet (EUV) lithography around 2002-2004.
  • Intel is also funding research into computational lithography to avoid having to do immersion lithography, like IBM and others are doing for the next generation.
  • AMD & IBM were partnering on a test fab for EUV lithography in 2006 and had successfully demonstrated the ability to create transistors but were still working on metal interconnects at that time. I'd bet money they've gotten past that point by now.
  • IBM did a lot of pioneering work on strained silicon that they announced back in 2001.
  • Silicon-on-insulator (SOI) was another fab technology they pioneered in 1998, but it hasn't spread much in the industry beyond them, AMD, and Motorola / Freescale -- in other words, IBM and its partners.
  • And then again, back to IBM, they were the first company to come up with a viable process for laying down copper interconnects, using what's called a dual-damascene process, in the late 90's.
  • Hitachi has been actively developing electron-beam lithography for over a decade, but the technology has yet to really live up to its promise as a commercially viable competitor for photolithography AFAIK.

Some of the above research was about commercializing "pure" research done in independent labs like this experiment, but a lot of it was directly funded by the big fabrication companies and their clients and partners. Since I'm not in the fabrication industry myself, I can't really comment any further on who has done what (and how much each of the above deserves credit). This is just news I remember from years past.

Re:Impact on Big chip manufacturers (1)

GanjaManja (946130) | more than 5 years ago | (#25523895)

Intel is also on the forefront of photonic interconnects for Processors. HP just jumped on board a year or two ago. Often they fund university research and then try to implement it viably in CMOS or current fab processes.

Hybrid Si Laser by UCSB [intel.com]

Hooray for the Athlon64 X200! (4, Funny)

NerveGas (168686) | more than 5 years ago | (#25520429)

Just think... we'll be able to have 198 cores doing nothing, now!

Re:Hooray for the Athlon64 X200! (1)

SanityInAnarchy (655584) | more than 5 years ago | (#25520521)

It actually says nothing about whether or not these microprocessors would be able to operate faster.

But assuming this is real, it one of two things:

Maybe we'll have 200 cores which are about as fast as single cores we have now, in which case, nothing will be slower, and people who planned ahead (like Erlang developers) will find themselves running much faster. On top of that, embarrassingly parallel applications like raytracing will be that much more viable -- consider that it only took 16 cores to make a good Quake 4 raytraced, and this scales linearly.

That, or we have 200 cores, each of which is tens or hundreds of times faster than what we've got now. In which case, WTF do I care that 198 of my cores are doing nothing, when the other two are running my Ruby and Python apps as though they were hand-optimized assembly?

I am making one assumption, though: That RAM keeps up. It would really suck to have 198 cores sitting idle, and the other two mostly just waiting for your RAM.

Re:Hooray for the Athlon64 X200! (1)

jlarocco (851450) | more than 5 years ago | (#25520691)

That, or we have 200 cores, each of which is tens or hundreds of times faster than what we've got now. In which case, WTF do I care that 198 of my cores are doing nothing, when the other two are running my Ruby and Python apps as though they were hand-optimized assembly?

All other things being equal, C or hand-optimized assembly will still be faster than Ruby or Python. Maybe the faster processors make the Ruby and Python "fast enough", but they still won't be as fast as hand-optimized assembly language or C.

Of course that's ignoring the possibility of a big break through in interpreter and code generation technology before these chips come out.

Re:Hooray for the Athlon64 X200! (1)

SanityInAnarchy (655584) | more than 5 years ago | (#25523071)

All other things being equal, C or hand-optimized assembly will still be faster than Ruby or Python.

True, and for some things, it will matter.

But take right now -- how many apps are Ruby or Python "too slow" for, on modern processors?

Of course that's ignoring the possibility of a big break through in interpreter and code generation technology before these chips come out.

It seems to be pretty steadily moving along. Just look at the recent JavaScript improvements.

Granted, none of these will be able to match hand-optimized assembly, by definition, because we can always output exactly the same program the compiler would (VM, runtime optimizations, and all), and additionally handle corner cases that the VM might be slower with.

But that distinction is already widely considered irrelevant for C. Games are arguably the place where you'd expect vertical scalability to matter the most, yet most are going to be written in C or C++, with performance-critical bits in hand-optimized assembly. Similarly, almost all dynamic languages provide reasonable ways to write small, performance-intensive parts of your application in C, and leave the rest in your language of choice -- you could even optimize down to assembly there, if it mattered.

Because when you get right down to it, the amount of time you're going to lose simply developing in assembly, let alone debugging, is something you can't afford for the benefit you get.

It's doubtful Crysis would sell a single copy more if it managed to squeeze another 5-10 fps out of equivalent hardware -- everyone would still have to upgrade anyway.

Re:Hooray for the Athlon64 X200! (1)

maxume (22995) | more than 5 years ago | (#25520797)

I bet hand optimized assembly would still be faster (I do understand what you are driving at, but even on the 'garbage' available today, a huge swath of programming tasks are 'fast enough', even if implemented in something like Ruby or Python).

Re:Hooray for the Athlon64 X200! (1)

jschen (1249578) | more than 5 years ago | (#25520825)

I am making one assumption, though: That RAM keeps up. It would really suck to have 198 cores sitting idle, and the other two mostly just waiting for your RAM.

Presumably, as chips get faster, larger caches and more intelligent caching will become ever more important. Latency for main memory access really hasn't improved much from my first computer (Mac SE) to my current computer. Happily, though, the entire contents of my first computer's hard drive can now fit in 1% of my current computer's main memory, and the entire contents of my first computer's RAM easily fits within the on-chip cache.

Re:Hooray for the Athlon64 X200! (1)

NerveGas (168686) | more than 5 years ago | (#25523751)

RAM is actually a good point... maybe they can put 16 tiny cores on the chip, and use the rest of the real estate for SRAM.

Isn't quantum effect the main problem now? (2, Insightful)

DoofusOfDeath (636671) | more than 5 years ago | (#25520467)

I thought that the real problem now wasn't our ability to get feature sizes small, but rather that at those sizes, quantum effects really start to matter.

So how does being able to produce such small features really help us?

Re:Isn't quantum effect the main problem now? (1)

cnettel (836611) | more than 5 years ago | (#25524177)

Semiconducting is always a matter of quantum effects. The doping needed to get the desired effects are going down to single atoms, which complicates things, and tunneling can certainly also be an issue, but it's not like these things would rely on the world being essentially Newtonian.

What? (0)

Anonymous Coward | more than 5 years ago | (#25520475)

100x Denser Chips

I thought Dorito's were dumb...

Finally, a use for Roland's dick (-1, Flamebait)

Anonymous Coward | more than 5 years ago | (#25520487)

And you thought something that small would forever be useless.

(Yeah, it's flamebait. But, it's aimed at Roland.)

Re:Finally, a use for Roland's dick (2, Informative)

philspear (1142299) | more than 5 years ago | (#25520753)

Not that it matters, but that's off-topic, not flamebait.

Plasmonic? (5, Funny)

gsgriffin (1195771) | more than 5 years ago | (#25520513)

Was this developed at the Gizmonic Institute?

Re:Plasmonic? (0)

Anonymous Coward | more than 5 years ago | (#25522149)

Congratulations, that was the correct answer!
You've won a lifetime supply of cheesy movies, and a fabulous vacation...

Re:Plasmonic? (1)

holywarrior21c (933929) | more than 5 years ago | (#25523595)

For those who wondered what plasmonic is: What is plasmonic? [wisegeek.com]

Re:Plasmonic? (1)

gsgriffin (1195771) | more than 5 years ago | (#25526177)

For those who wonder what Gizmonic Institute is? MST3K [wikipedia.org]

Another maskless scanning lithography system (4, Informative)

Yarhj (1305397) | more than 5 years ago | (#25520531)

One of the difficulties with a scanning technology like this is throughput -- with mask-based lithography you can expose dice with great speed, while something like this will have to scan across the entire surface of the wafer. It sounds like there's good potential for parallelization (the article mentions packing ~100k of these lenses onto the floating head), so this technology won't necessarily be as slow as electron-beam lithography, but I can't imagine it'll be cheap either. Furthermore, the software and hardware involved must be much more complex than a conventional stepper; now you've got to modulate your light-source very rapidly, rotate your wafer, and keep track of the write-head's position to sub-nanometer precision. Tool design and maintenance costs will be pretty high, I imagine.

Re:Another maskless scanning lithography system (2, Informative)

TubeSteak (669689) | more than 5 years ago | (#25521749)

so this technology won't necessarily be as slow as electron-beam lithography, but I can't imagine it'll be cheap either.

You obviously didn't RTFA.

Modern 40/45nm and the upcoming 23nm chips need very short wavelengths to get produced.
This is expensive.

The new technique uses relatively long ultraviolet light wavelengths.
This is very cheap.

The researchers estimate that a lithography tool based upon their design could be developed at a small fraction of the cost of current lithography tools.

Re:Another maskless scanning lithography system (3, Interesting)

Yarhj (1305397) | more than 5 years ago | (#25522633)

Modern 40/45nm and the upcoming 23nm chips need very short wavelengths to get produced. This is expensive.

The new technique uses relatively long ultraviolet light wavelengths.

There's certainly a cost advantage to using longer-wavelength light for the exposure, but there's also a tradeoff in device complexity. Using longer-wavelength light for the exposure translates to cheaper lamps, mirrors, and optics, but the added complexity is going to add a lot of cost to the design and maintenance of these tools.

A conventional stepper performs a series of mechanical and optical alignments before exposing a die on the wafer, then steps to the next die to continue the process. A lithography tool based on floating-head plasmonic technology requires at least two things:

1. Precise control of the rotation speed. We need the pattern to be written uniformly across the entire wafer, and we want ALL the devices on the wafer to be exactly the same.

2. Fine control of the exposure lamp. We need to expose nanometer-scale sections of a 300mm wafer, spinning at 12m/s (roughly 400rpm). Furthermore, we need to align exposures in each exposure "track" to one another.

The hardware and software to provide this level of dynamic control will add a lot of complexity (read: $$$) to the design and operation of these tools.

One other thing; the entire point of the floating write-head is to keep the separation between the head and the wafer constant as it scans across the wafer: the surface of a silicon wafer becomes more and more erratic as the processing continues. Surface variations are on the scale of the transistor dimensions (~50-100nm these days). This would tend to hamper the massive parallelization that the article authors hope for, as a 100k microlens write head will be significantly larger than a single transistor, and won't be able to float accurately over the surface of the wafer.

Re:Another maskless scanning lithography system (1)

julesh (229690) | more than 5 years ago | (#25524391)

This is very cheap.

The real question is how cheap. Current generation lithography systems have become ridiculously expensive. Preparing a mask for a 65nm process costs in excess of $2M. This makes short-run production at not-even-cutting-edge technology levels extremely expensive, and basically discourages smaller chipmakers from considering any niche applications that might require higher density.

Even if the production process is slower, if this can cut the initial preparation costs significantly, it could make the niche IC market somewhat more viable.

Riemann Zeta Hypothesis Proven (-1, Troll)

crowlogic.net (1392587) | more than 5 years ago | (#25520675)

I solved it... http://crowlogic.net/zeta.pdf [crowlogic.net] fucking pass it everywhere because the godddamn submission queue is filtering it, since its obviously not smart enough to understand the implications of this. In fact, spread that url to every place imaginable... make it ubiquitous acroess the web,academic sites, jurnals, etc. I tried to publish at arxiv.org but they have this fucking absurd "referral systtem". I dont have referrals because I am better than everyone, and the proof backs that up. http://crowlogic.net/zeta.pdf [crowlogic.net]

Re:Riemann Zeta Hypothesis Proven (1)

XXL_Jones (1385097) | more than 5 years ago | (#25520895)

TBH you sound like a fruitcake, talking like that. But the paper is quite interesting. Ever heard of Robin's Theorem, by any chance? Don't see that covered.

Re:Riemann Zeta Hypothesis Proven (1)

XXL_Jones (1385097) | more than 5 years ago | (#25522549)

Meh, just found out the only reason it looked interesting, is because it's a cut-and-paste job of other peoples' abstracts. Get a life.

Re:Riemann Zeta Hypothesis Proven (-1, Offtopic)

Anonymous Coward | more than 5 years ago | (#25521137)

Don't post irrelevant stuff like that on slashdot... Try usenet instead, there's probably some experts and suitable group for this... If you post it here... People are going to think you're crazy!

Government funding (4, Funny)

philspear (1142299) | more than 5 years ago | (#25520743)

Nano-something you say? Can it possibly be used in the production of biofuels to increase homeland security against bioterrorism? If so I have a big check for you to pick up.

More Than Just Denser Chips (0)

Anonymous Coward | more than 5 years ago | (#25520855)

Why does it get compared to an "old-fashioned LP turntable?" It looks much like a hard drive's head in the illustration and then there's that part about air bearings later in the article.

Anyway, beside denser chips, I can already see this change how chips are made the same way digital presses changed printing. Just load a file into a computer and you're ready to go.

Terrabyte drives not enough? (0, Offtopic)

syousef (465911) | more than 5 years ago | (#25520965)

I just had 2 fail over the weekend. I didn't lose anything vital because I had backups but everything I considered non-essential is gone (mostly just lots of VMWare images of various distros). At some point it beocmes a bitch to manage so much data.

Somewhat OT, but... (1)

BluBrick (1924) | more than 5 years ago | (#25521829)

I just had 2 fail over the weekend. I didn't lose anything vital because I had backups but everything I considered non-essential is gone (mostly just lots of VMWare images of various distros). At some point it beocmes a bitch to manage so much data.

How old were they? I would have thought that drives young enough to be around that capacity would be nowhere near their MTBF*. Is this a reflection of a general decline in manufacturing standards? Are manufacturing standards decreasing with increased capacity? Or is there something else about these high capacity drives that reduces their reliability?

* Yes I understand that the M stands for mean and that some units fail earlier than most in order to make up that particular average. Still, a few years is well below the 100's of 1000's of hours usually quoted for modern high capacity drives.

Re:Somewhat OT, but... (1)

syousef (465911) | more than 5 years ago | (#25524341)

I bought the system in June, so around 5 months old. One had a bad block. I pulled it out and when I powered back on the other one started ticking. I have no idea what happened? Static discharge? One drive affecting the other? Who knows. Anyway they're very well ventilated (2 large case fans sitting in front of the 4 drives. Their temp had never exceeded 40 degrees (usually around 28-32 when chugging along and sat at 25 idle with some variation depending on the weather). This machine is always on though.

Anyway I was able to pull what little I hadn't backed up off the original drive, but the one that started ticking means I lost stuff I didn't consider important enough to back up (mostly VMWare images).

Re:Terrabyte drives not enough? (1)

Thing 1 (178996) | more than 5 years ago | (#25522745)

At the risk of veering off-topic like you were modded, I had a 1 TB (Seagate!) drive fail in the past week myself, one of a purchase of 3. In the process of RMAing it. Luckily, like you, I hadn't decided to trust any data solely to it yet; so nothing was lost. Still, that purchase more than doubled the data storage in this house, in other words, those three drives together can store more data than the 40+ other drives I have in and out of machines here. (Did I just set myself up for a burglary? :) Probably not, as they're mostly 10 GB or so...)

Re:Terrabyte drives not enough? (1)

syousef (465911) | more than 5 years ago | (#25524361)

Yeah they're damn convenient to have. I just hope reliability doesn't prove to be as bad as I suspect it will.

Tsk, tsk. (-1, Redundant)

Anonymous Coward | more than 5 years ago | (#25521695)

As if the clueless chips we had before weren't bad enough... Now we have super-dense chips that are hopelessly clueless.

Umm. Duh. (-1, Troll)

Anonymous Coward | more than 5 years ago | (#25521697)

This is so obvious. Why is this news?

Overlay?? (1)

drhank1980 (1225872) | more than 5 years ago | (#25523187)

Do they have a solution for controling overlay error between processing layers to less than 1.25nm?

If the answer is no, this technology is dead in the water as far as IC fabrication goes. (but may have very useful applications in other nanotech fields)

As someone who works in litho, I enjoy reading about any advances in resolution, but know that any advance in resolution must be accompanied by an even larger improvement in the non-insignificant task of placing each of the 10 to 50+ patterns needed to build an IC perfectly on top of each other across the various and ever changing film layers that make up todays chips.

   

Heh. (1)

vegiVamp (518171) | more than 5 years ago | (#25525067)

As usual, the industry thinks that Moore is better.

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