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Engineers Create Tiny Wires WIth Old Technique

timothy posted more than 4 years ago | from the race-to-the-bottom dept.

Technology 27

Gamp writes with this interesting snippet: "As microprocessors have shrunk, the wiring between them hasn't always kept up. But engineers at the University of Illinois are changing that with a decades-old metalworking technique. It's called electrodeposition. It's basically the same process used in electroplating, but instead of depositing metal on a surface, as when trying to make a gold-plated piece of jewelry, the metal is deposited in a wire. 'People weren't thinking about how to fabricate a wire in three dimensional space,' said Min-Feng Yu, a professor of mechanical science and engineering."

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fp (-1, Offtopic)

Anonymous Coward | more than 4 years ago | (#32938182)


transistor density (1)

dnwq (910646) | more than 4 years ago | (#32938242)

Any impact on Moore's Law?

Re:transistor density (4, Interesting)

JoshuaZ (1134087) | more than 4 years ago | (#32938262)

Any impact on Moore's Law?

Well, according to TFA:

Scaled up to industrial size, the method could save microprocessor companies a lot of money, Yu said, because about 30% of the space in a microchip wafer is taken up by the wires between components

Given that, I'm going to tentatively answer your question with a "yes."

Re:transistor density (4, Interesting)

Trepidity (597) | more than 4 years ago | (#32938266)

Technically a bit different issue than the way Moore phrased it, but conceptually could have some related effects. Moore was predicting an increase in transistor density of integrated circuits (ICs), while this work scales down the size of interconnects between separate ICs. That could have the same effect of increasing overall transistor density for an electronic component, but is a somewhat different than increasing transistor density within a single IC. For example, it won't allow CPUs to pack transistors more densely, because CPUs are already a single IC.

Re:transistor density (2, Funny)

Anonymous Coward | more than 4 years ago | (#32938468)

Oh IC now.

Re:transistor density (1)

Alwin Henseler (640539) | more than 4 years ago | (#32938666)

Also wouldn't seem practical to move a 'copper-printing pipette' around a silicon die to lay all the copper interconnects, unless you could have hundreds or thousands of such pipettes doing that simultaneous (still not efficient compared to existing methods I'd guess).

But perhaps a nice technique for silicon pad <-> I/O pin wiring. If result would be a stronger bond than what's currently done, perhaps that could improve reliability for some IC package types. And of course die-die interconnects for multi-chip modules.

Re:transistor density (2, Interesting)

smallfries (601545) | more than 4 years ago | (#32938942)

It could be more tightly related than that, but it depends on how scalable and reliable it is. Rather than predicting an increase in transistor density, Moore actually predicted an increase in transistor density at a fixed price-point. This is the same as a reducing price-point for a given transistor budget.

So one way to increase power would be to assemble processors out of smaller units. If each unit is an IC with a fixed transistor budget and this provides a reliable and scalable way to assemble those ICs into chips then it could have quite a large impact on the growth of processor performance.

Re:transistor density (-1, Troll)

Anonymous Coward | more than 4 years ago | (#32938734)

Moore's Law isn't a fucking law, you lowlife shit stain.

Re:transistor density (1)

Profane MuthaFucka (574406) | more than 4 years ago | (#32940666)

Yes, it is a law, you mathematically ignorant slut.

Re:transistor density (2, Informative)

Jeprey (1596319) | more than 4 years ago | (#32942732)

As someone actually deep in the industry (rather than speculators and wannabes), specifically to density and Moore's Law, I'd say not so much. Reason: electromigration. It's electromigration that defines design rule line widths for metal in microelectronics.

The researcher (like most/many academics) is clueless about real life applications and doesn't really understand the driving factors of the technology he claims this could replace. I.e. he's pulling masturbatory fantasies out of his ass when he talks about that 30% improvement. That's the problem with specialization and with ivory tower isolation.

Electromigration is the failure mechanism of very small metal lines and wires in microelectronics. Basically momentum of electrons in a current is transferred to metal atoms and they are forced to move. This results in extrusions and voids in the metal line forming over time. The effect occurs to some degree over time at all temperatures and all currents - only the rate of action is changed. Because voids increase resistance and thus current density, the system has a positive feedback loop.

Making lines smaller raises the current density which raises both the electron flux and the temperature of the metal line which both increase electromigration. It doesn't really matter what technique (to 1st order) you use to make the line; making the lines smaller is the critical 1st order factor affecting failure rates.

If (and only if) this technique can impact the grain boundary orientation could the reliability be improved but even then current thin film deposition techniques mostly have this dialed in already.

The place I see this having the most value is in being able to create entirely new wiring schemes such as 3D integration or in planarizing things like wire bonding to get the photolithography advantage. The latter less so - planar alternatives already exist. That's about it.

Re:transistor density (0)

Anonymous Coward | more than 4 years ago | (#32943700)

There is no way this could replace lithography for planar interconnects, obviously, but it could indeed be nice for die-pad connections and multi-chip integration (side-by-side or 3D die stacking) since the current solution (wire bonding) is already sequential: I could see things such as non-monolithic MEMS assemblies benefiting from it. Not so much for high transistor density wafers...

link to (unfortunately, paywalled) paper (5, Informative)

Trepidity (597) | more than 4 years ago | (#32938252)

I hate it when news articles don't either link to the original scientific paper, or at the very least tell me what issue of what journal it was published in! Given the state of journalism-about-scientific-research, I like checking up on the original paper, either for more details, or for a better "related work" section (often the actual papers will be much more honest than the press releases about which parts of the work are new and which parts aren't, and how it relates to existing work).

Anyway, it's this:

Jie Hu and Min-Feng Yu (2010). Meniscus-Confined Three-Dimensional Electrodeposition for Direct Writing of Wire Bonds [] . Science 329(5989): 313-316.

Re:link to (unfortunately, paywalled) paper (0)

Anonymous Coward | more than 4 years ago | (#32938488)

Thank you...

Useless (0, Flamebait)

Anonymous Coward | more than 4 years ago | (#32939190)

So, richfag, why don't you pay the US$15 and then copy/paste the article for us to read?

Information wants to be free.

Re:Useless (0)

Anonymous Coward | more than 4 years ago | (#32939494)

here you go cheapfag... I've downloaded it for you (was free): []

Re:Useless (0)

Anonymous Coward | more than 4 years ago | (#32940036)

Information doesn't want jack shit. The only reason we get so much free stuff online is because there are many people generous enough to send their time putting it there. So, practice what you preach, and put the fucking thing up yourself instead of being yet another leech.

Article with pictures (5, Interesting)

simula (1032230) | more than 4 years ago | (#32938298)

For anyone interested in seeing what the results of this technique create, check out the NewScientist article that covers the same topic: []

Re:Article with pictures (1)

ricera10 (932325) | more than 4 years ago | (#32939116)

Are we going to start installing cube-like processors into our motherboards in the future? That would honestly be pretty cool, but it'd probably require different ways to cool the chips rather than simply pasting a cooling assembly on top of them.

3D printers (1)

Alsee (515537) | more than 4 years ago | (#32939036)

It sounds like this might be another step forward for self replicating 3D printers. [] The best 3D printers print all of the plastic components to produce more 3D printers, but they are not yet able to print some of the necessary electrical components.


Thin copper wire (1)

reboot246 (623534) | more than 4 years ago | (#32939788)

I thought that everybody knew copper wire was invented by two lawyers arguing over a penny.

Or was that two politicians?

Re:Thin copper wire (2, Funny)

PolygamousRanchKid (1290638) | more than 4 years ago | (#32939940)

With two lawyers, you would get a wire.

With two politicians, you get a missing penny.

I just know (1)

hellop2 (1271166) | more than 4 years ago | (#32940970)

There's an "oldest profession" - "tiny penis" joke in here somewhere.

A minor hitch detected (1)

Artem Tashkinov (764309) | more than 4 years ago | (#32941442)

I'm sorry for being meticulous, but there's an error in the title: Engineers Create Tiny Wires W I th Old Technique.

Going brogue? (1)

wrencherd (865833) | more than 4 years ago | (#32950908)

Perhaps the typist was a Scotsman.

Out of date (1)

KiwiCanuck (1075767) | more than 4 years ago | (#32951172)

This tech is outdated. Most chip mfg use solder balls en lieu of wire bonding. Wire bonding take too much time. The copper used inside/on the die is electroplated. This tech is not directly useful to most IC manufacturers. Perhaps it may be useful to a niche market.

... yep, that's totally new ... (1)

ninjagin (631183) | more than 4 years ago | (#32951598)

"People weren't thinking about how to fabricate a wire in three dimensional space,' said Min-Feng Yu, a professor of mechanical science and engineering.". Yep. That's why wires have been two-dimensional up to now.
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