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Multi-Core Voltage Regulators To Increase Processor Efficiency

Roblimo posted more than 3 years ago | from the now-we-need-multi-core-voltages-to-regulate dept.

Power 64

cylonlover writes "For decades, chipmakers strove to develop the fastest and most powerful chips possible and damn the amount of electricity needed to power them, but these days raw grunt isn't the only consideration. As more and more devices go mobile and these devices become more and more powerful, chipmakers must also take the energy efficiency into account. Harvard graduate student Wonyoung Kim has developed and demonstrated an on-chip, multi-core voltage regulator (MCVR) that he says could allow the creation of 'smarter' smartphones, slimmer laptops and more energy efficient data centers by more closely matching the power supply to the demand of the chip."

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64 comments

a 'smart smartphone' ? (2)

arisvega (1414195) | more than 3 years ago | (#35345738)

That's lame, even within their already lame marketing speech.

Re:a 'smart smartphone' ? (1, Funny)

greatica (1586137) | more than 3 years ago | (#35345782)

Don't you mean a "lamer" lame?

Re:a 'smart smartphone' ? (0)

Anonymous Coward | more than 3 years ago | (#35348924)

Yes, in a 'bluer kind of white' way.

Re:a 'smart smartphone' ? (0)

Anonymous Coward | more than 3 years ago | (#35346298)

I prefer my dumbphone dumber :D

Re:a 'smart smartphone' ? (1)

gl4ss (559668) | more than 3 years ago | (#35346344)

gizmag sucks, so does gizmodo and everything with giz.

I fail to see the 'new' in this? were on-die dc-dc regulators impossible before? I find that hard to believe and per core sleeping etc too is such obvious things that I fail to see how thinking them up is revolutionary.

Re:a 'smart smartphone' ? (1)

kj_kabaje (1241696) | more than 3 years ago | (#35346652)

Yes, Gidget was always much hotter.

Re:a 'smart smartphone' ? (1)

skids (119237) | more than 3 years ago | (#35347670)

I found the article interesting. Just because it's common sense doesn't mean it isn't worth doing a status report on the current state of progress in this area.

True, some new non-SVR MEMs-ish converter would have been more exciting, but it's nice to know that there is still some efficiency/stability to glean from SVR technology.

Re:a 'smart smartphone' ? (1)

hitmark (640295) | more than 3 years ago | (#35353202)

At least gizmag do not appear to have asshat writers that insert personal opinions into every story written.

Re:a 'smart smartphone' ? (1)

BillX (307153) | more than 3 years ago | (#35353610)

True. On-die, per-core power management tightly integrated with what the CPU is actually doing is certainly a Good Thing (disclaimer: I design ultralow power / energy harvesting systems, so I'm biased ;-) , but you're right that here's really nothing 'new' here. Dynamic voltage scaling (many chips may safely derate voltage with lower operating frequency, and let the voltage sag much lower if they only need to retain memory contents) at the per-core or even on-chip-module level is already becoming a fad, and any CPU/MCU worth its salt already gates the clock or actively cuts power to modules not in use. To be fair, the article mentions that DVS and cutting power to subsystems is already common, and that the real difference is in tracking CPU demand to within some nanoseconds. Per-core vs. per-chip voltage control is a purely academic distinction these days, when even single-core chips take two or three separate / scalable voltages for different on-chip modules.

Re:a 'smart smartphone' ? (1)

Gilmoure (18428) | more than 3 years ago | (#35348024)

Would these be nerd smartphones?

Software Underclocking/volting (1)

TubeSteak (669689) | more than 3 years ago | (#35345744)

Does anyone know of a good software solution until this kind of thing gets baked into the hardware?

Right now I use RM Clock [rightmark.org]
(which hasn't been updated since 2008)

It drops voltages & multipliers lower than the standard intel/windows/BIOS options.

I don't see how it can work well in software (1)

Viol8 (599362) | more than 3 years ago | (#35346262)

The process monitoring CPU usage could be swapped out while a process that requires high CPU usage and hence a higher voltage is swapped in. Of course it won't get the higher voltage until the monitoring process is swapped back and by then its too late. Catch 22.

Re:I don't see how it can work well in software (1)

indeterminator (1829904) | more than 3 years ago | (#35351392)

It is possible to prevent specific parts of processes' memory from being swapped out.

If it wasn't, the code that is responsible for bringing in pages from swap might end up swapped...

Re:I don't see how it can work well in software (1)

Chris Burke (6130) | more than 3 years ago | (#35353332)

They didn't mean "swapped" as in paged out to disk. They meant the OS scheduling other processes, "swapping" the context for that process in and swapping the context for the monitor out.

To really take advantage of a regulator that can modify voltages in tens of nanoseconds, it's really going to take hardware monitors keeping track of activity on a very fine-grained level.

Really I think that's fine. Software can handle the high-level power decisions based on what the chip is going to be doing over the next few milliseconds, while the hardware can do the fine-tuning on the nano- or micro-second scales within the high-level parameters.

Re:Software Underclocking/volting (1)

hairyfeet (841228) | more than 3 years ago | (#35346406)

Uhhhh...why? Seriously both Intel and AMD have excellent power management and can drop the speed and thus voltage of cores not being used (I know AMD has had this since Phenom, I'm sure Intel has the same) and frankly if you really care about power usage not only do the default chips do a bang up job but both AMD and Intel offer ULV desktop and laptop chips that go even lower (AMD has the 610e which is a 45w max quad core, Intel I believe goes even lower) so honestly, what is the point?

If they want to give us better battery life in mobile devices they need to either come up with new battery tech or quit building everything with iSliver batteries! I'd love to seriously bitchslap the moron that thought you could rip off battery design from Apple, whose limited hardware set and control over the OS allows them to tailor the entire system to the design and apply those same iSliver batteries to general purpose machines running general purpose OSes like Windows or Android.

Let Apple keep the iSliver and give us real batteries or come up with some new tech already!

Re:Software Underclocking/volting (0)

Anonymous Coward | more than 3 years ago | (#35346900)

because there are more grad students than original ideas to go around. everyone has to publish.

Linked site caused Firefox to crash ... (0)

Anonymous Coward | more than 3 years ago | (#35345748)

... just a warning.

Re:Linked site caused Firefox to crash ... (0)

Anonymous Coward | more than 3 years ago | (#35345768)

Too bad. Safari doesn't (crash) ;P ...just an advice.

Re:Linked site caused Firefox to crash ... (1)

ExploHD (888637) | more than 3 years ago | (#35345802)

That's because there is a virus trying to load from the link (JS I assume). Thankfully my AV stopped it and warned me about it.

Re:Linked site caused Firefox to crash ... (1)

Anonymous Coward | more than 3 years ago | (#35345820)

Chrome is fine. And, err, no virus, as dumbass above claims.

Re:Linked site caused Firefox to crash ... (0)

Anonymous Coward | more than 3 years ago | (#35347786)

He was half right, one of the ad networks they use has ads loaded with malware. Took me about 50 samples in order to get it though.

Nope (1)

Hammer (14284) | more than 3 years ago | (#35346130)

Nope it does not!
At least not running a fully up to date Firefox on a real OS ;-)

Intel showed the same thing 6 years ago (5, Interesting)

YesIAmAScript (886271) | more than 3 years ago | (#35345818)

Including the same charts and graphs.

http://www.anandtech.com/show/1770 [anandtech.com]

How this guy is going to get a patent on this stuff based upon his work in 2008 when Intel showed it onstage at IDF in 2005 is beyond me.

Re:Intel showed the same thing 6 years ago (0)

Anonymous Coward | more than 3 years ago | (#35345950)

In their graph they are actually predicting user demand, how are they gonna achieve this in real life ?

Re:Intel showed the same thing 6 years ago (1)

dkf (304284) | more than 3 years ago | (#35346340)

In their graph they are actually predicting user demand, how are they gonna achieve this in real life?

That might actually be possible given the very short spin-up time, e.g., by scanning the prefetch queue for expensive operations (e.g., floating point multiply and divide) so that you can up the power while the operands for them are still being fetched. It's also not a disaster if the power is a bit low; the chip just goes a little bit slower for a short time.

Re:Intel showed the same thing 6 years ago (0)

Anonymous Coward | more than 3 years ago | (#35346414)

Well the difference is that it adjusts multiple cores, whereas intel made it work for only one core?

It probably uses some different techniques, which allows it to be patented.

Re:Intel showed the same thing 6 years ago (1)

tixxit (1107127) | more than 3 years ago | (#35346922)

It varies the voltage to each core. If people can get new patents by adding "on the web" or "on a cellphone" to an existing technology, then I'd bet that this guy can get a patent by adding "for multiple cores".

Re:Intel showed the same thing 6 years ago (1)

warrior (15708) | more than 3 years ago | (#35347462)

Amd has been able to do this for quite a while as well. It was first featured in the Phenom quad core, which came out in 2007, so design work started much earlier.

Re:Intel showed the same thing 6 years ago (0)

Anonymous Coward | more than 3 years ago | (#35352826)

Look at the timescales. Intel's ramps up in about 1 ms (1.000.000 ns). This design ramps up in 20 ns. Being 50.000 times faster than Intel sounds patent-worthy to me.

Re:Intel showed the same thing 6 years ago (1)

Lord_Byron (13168) | more than 3 years ago | (#35354376)

Good point, the USPTO never flubs checking for prior art...

Not sure if this is the same sort of thing... (1)

Anonymous Coward | more than 3 years ago | (#35345870)

http://www.powervation.com/

This company has a power control chip which has firmware which you can tailor to the hardware it is attached too. And its available to buy right now.

Re:Not sure if this is the same sort of thing... (1)

Enigma23 (460910) | more than 3 years ago | (#35348480)

http://www.powervation.com/

This company has a power control chip which has firmware which you can tailor to the hardware it is attached too. And its available to buy right now.

The reminds me of the Transmeta Crusoe [wikipedia.org] processor designs, which automatically shifted gears, moving the clock speeds up and down as more or less workload was put through the CPU.

Re:Not sure if this is the same sort of thing... (0)

Anonymous Coward | more than 3 years ago | (#35348848)

I'm know next to nothing about Semiconductor design, but I have worked for a few companies who are in the field. I think Powervation's chip tries to preempt the demands about to be placed on it using some sort of fancy wizardry. Never quite understood it myself but it seems to do a good job.

Distribution (3, Interesting)

MichaelSmith (789609) | more than 3 years ago | (#35345938)

So this is a way for an ALU (say) to send a message to to the MCVR saying "we need ten trillion electrons" when it is asked to a floating point multiplication, then the electrons get parcelled out and the ALU shuts down when the job is done. Sounds reasonable but there is still going to be a voltage regulator off the chip. This is more like an intelligent distribution system.

SmartReflex? (3, Interesting)

queazocotal (915608) | more than 3 years ago | (#35345986)

Sounds similar to SmartReflex (tm) which is shipping on millions of phones.
http://focus.ti.com/general/docs/wtbu/wtbugencontent.tsp?templateId=6123&navigationId=12032&contentId=4609&DCMP=WTBU&HQS=ProductBulletin+PR+smartreflex [ti.com]

Where it differs is that there is an on-chip regulator to do the dynamic scaling.
The TI solution has a couple of regulators on-chip, with a couple of output voltages, as well as a more variable external solution.

The above device has variable regulators on-chip. (for annoying technical reasons, these are linear regulators, not switching,
so if they regulate to 50% output - half the (reduced amount of power needed) is wasted as heat.

Re:SmartReflex? (1)

MichaelSmith (789609) | more than 3 years ago | (#35345996)

for annoying technical reasons, these are linear regulators, not switching

Because capacitors are bulky? I wonder if a regulator could be made to switch at a convenient frequency, perhaps by combining the power supply with the clock, if thats not too naive an idea about how these chips operate.

Re:SmartReflex? (0)

Anonymous Coward | more than 3 years ago | (#35346104)

for annoying technical reasons

Needs more blue smoke.

if thats not too naive an idea about how these chips operate.

You forgot an apostrophe, and most engineers are old - damn old. Naivete in their presence is guaranteed.
Question is, can you make it past the Wicked Witch and her flying monkeys to ask the Wizard?

TFS is silly and wrong. (2)

serviscope_minor (664417) | more than 3 years ago | (#35346012)

CPU manufacturers have been caring about power efficiency for a vasy long time.

In fact, the first version of the ARM processor (in the 80's) was designed around its power usage so that they could use a cheap plastic carrier, rather than a very expensive ceramic one like all the competeing chips.

Re:TFS is silly and wrong. (2)

Another, completely (812244) | more than 3 years ago | (#35346094)

At the data center end of the scale, the Power7 was only released in 2010, but the planning probably took a couple of years. It includes not only power control for each core, but the clever bit is the PowerProxy that helps pick a suitable level for each. There's a quick overview over at The Register [theregister.co.uk] .

Power6 (2007) had variable clock speed. Could you also adjust the voltage to each core? Is there a big advantage to reducing the clock speed if you don't also drop the voltage?

Re:TFS is silly and wrong. (1)

SuricouRaven (1897204) | more than 3 years ago | (#35348450)

Giving an incredibly simplified equasion, power consumption is directly proportional to clock frequency, and proportional to the square of the voltage.

earn money easy (-1)

Anonymous Coward | more than 3 years ago | (#35346048)

http://path2earnmoney.blogspot.com/

marketing speak (0)

Anonymous Coward | more than 3 years ago | (#35346148)

Translation:
After years of marketing magahurts we have now moved on... to marketing the number of cores. Of course in a phone most of these cores end up doing nothing most of the time, most of the real work is done on the baseband, so we need a circuit to shut down cores that we sold but are not being used.

Anyways, everyone knows 64 Cores ought be be enough for everybody

Underwhelmed (5, Informative)

dtmos (447842) | more than 3 years ago | (#35346222)

I confess I am totally underwhelmed. Every chip I have designed since the 1990s (mostly wireless chips with embedded MCUs and DSPs, for portable applications) has had multiple voltage domains with multiple, independently controlled, on-board linear regulators -- sometimes as many as six or eight of them. Each MCU (and/or DSP) core always has its own regulator; it's the only way to meet the power budget of a mobile/portable product. Sometimes the voltage is dynamically controlled in response to processing requirements, and sometimes (if the processing requirements are relatively constant) the regulated voltage is designed to vary with temperature, so that at all times only the minimum voltage needed is supplied. (And yes, sometimes switching regulators are used, if the electrical noise can be tolerated in the application.)

ISSCC isn't known for accepting junk papers, so I'm hoping that what was actually presented (I didn't attend this year) was a novel on-chip voltage-regulation technique, and that the journalist has done a disservice to Kim by emphasizing the application, rather than the real novelty of his work.

The real problem with these designs is the interfaces between cores operating at different voltages. It's a PITA to do all the level-shifting to ensure that a core operating at 0.5 V can communicate with one operating at 1.2 V, ensure that one shut down doesn't affect one still operating, etc. There are lots of corner cases to consider (including transient effects while voltages and computing loads are dynamically changing), and a new technique to handle that reliably would be an advance in the art.

Re:Underwhelmed (1)

Viol8 (599362) | more than 3 years ago | (#35346278)

"It's a PITA to do all the level-shifting to ensure that a core operating at 0.5 V can communicate with one operating at 1.2 V,"

Why should it matter? If the one operating at 0.5 gets 1.2 for a few microseconds what harm is done other than a bit more power used for that time? If the bit threshold is lower than 0.5 in both anyway then either voltage will register as the correct bit.

Re:Underwhelmed (2)

dkf (304284) | more than 3 years ago | (#35346364)

Why should it matter? If the one operating at 0.5 gets 1.2 for a few microseconds what harm is done other than a bit more power used for that time?

IIRC, its going from the low-voltage to the high-voltage domain that's awkward; it's all too easy for the bits to not register properly. The other direction is no problem since you're going into a transistor immediately that is (of course) rated for the input.

Re:Underwhelmed (0)

Anonymous Coward | more than 3 years ago | (#35349526)

The question is how do you control the turn-on voltage when you have a device with multiple voltage states. Look at the datasheets of most typical microchips and you'll find that there are various specs mentioned for different voltages, including different transition levels. Designing chips that maintain a constant transition state for changing voltage levels, and can tollerate over voltage as well is a non trivial exercise.

Re:Underwhelmed (0)

Anonymous Coward | more than 3 years ago | (#35347846)

This work has multiple on-chip switching regulators (i.e. much more efficient than linear regulators) with on-chip inductors -- I believe that's the real novelty here.

Papers to read (2)

dtmos (447842) | more than 3 years ago | (#35348726)

This motivated me to look up some of Wonyoung Kim's [harvard.edu] papers. This one [harvard.edu] is a good overview of his research. Very nice work -- but almost unrecognizable from the Gizmag article.

Games (1)

Grindalf (1089511) | more than 3 years ago | (#35346276)

Does anyone remember intelligent processor cycling on mac portables? It guesses wrong and makes your games run clicky. Remember marathon on a 520c...

These are not "voltage regulators" (2, Interesting)

Anonymous Coward | more than 3 years ago | (#35346366)

Lotsa fuzzyness in this blurb. Let's see if we can help clarify:

(1) First, these are not "voltage regulators". in the usual sense of something that takes an unregulated voltage and provides a stable, regulated voltage. They're the opposite-- taking a relatively stable main battery bus and dropping it down to various lower and possibly varying voltages. The goal being to sacrifice some speed and noise margin in order to use less power.

(2) Next: putting voltage droppers on-chip inevitably leads to much lower efficiency-- the only way to efficiently drop voltage is to use a switching-mode regulator, which not only generates a lot of electrical noise, it requires a big hefty inductor and capacitor, neither of which can be made on-chip. This on-chip voltage-dropping scheme cannot be any more efficient that using a plain old resistor, where you end up wasting a lot of power to get to a lower voltage.

(3) Dropping the voltage is not the only way to save power. In a pure CMOS chip you can scale down the clock speed and the power usage goes down by the same factor. This is a whole lot simpler, reliable, and more power efficient than dropping the voltage.

Re:These are not "voltage regulators" (1)

arielCo (995647) | more than 3 years ago | (#35346564)

(2) Next: putting voltage droppers on-chip inevitably leads to much lower efficiency-- the only way to efficiently drop voltage is to use a switching-mode regulator, which not only generates a lot of electrical noise, it requires a big hefty inductor and capacitor, neither of which can be made on-chip. This on-chip voltage-dropping scheme cannot be any more efficient that using a plain old resistor, where you end up wasting a lot of power to get to a lower voltage.

You can have a big bunch of saved power regardless of the regulation scheme. It's all about the switching losses, v^2*c*f.

Re:These are not "voltage regulators" (0)

Anonymous Coward | more than 3 years ago | (#35347148)

>You can have a big bunch of saved power regardless of the regulation scheme. It's all about the switching losses, v^2*c*f.

Right, thanks for pointing out that the losses go down as the square of the voltage. BUT in any linear regulator, the wasted power also goes up proportionally to the voltage drop. If you drop the voltage to half, you're wasting HALF of the input power in the series regulator. Kind of a shame.

Re:These are not "voltage regulators" (1)

arielCo (995647) | more than 3 years ago | (#35347302)

Perhaps I should have said that V^2*C*f decreases because the average *current* goes down. Granted, a switching regulator would be even better (though I'm not sure that it holds true for small-ish drops), but you still save power with the linear regulator, which as you pointed out is power-wise equivalent to a series resistor.

Re:These are not "voltage regulators" (1)

skids (119237) | more than 3 years ago | (#35347908)

it requires a big hefty inductor and capacitor, neither of which can be made on-chip

According to the layout in TFA the caps are on-chip. Not all regulation schemes require an inductor -- depends on required parameters.

Based on gizmag discussion, not impressed (2)

jimmyswimmy (749153) | more than 3 years ago | (#35346566)

Based on what gizmag presents I'm not terribly impressed. There are several reasons to put the VR offboard. First is space, second is heat. A VR consumes a lot of both (relative to a microprocessor). You can easily see >5" square of space and >10W of power dissipation next to the processor (and everyone cries about it because of its location).

Since I don't see any resonant components included in the design it appears to me that this is a linear regulator, which will put out a lot of heat. In addition as it stands both Intel and AMD have the ability to dynamically scale the voltage they are being powered from. They can request a higher or lower voltage as well as (of course) draw more or less current, instantly, through their VID pins. So this sure doesn't sound like a great discovery, especially when you consider that the basic concept, as presented in the summary, is widely used and quite well known. But summaries by their definition don't tell the whole story, so perhaps there's more to it. I'll pull up the paper if it's available when I get to work.

As chip-on-chip technology becomes more widespread I will be interested to see what happens. It seems like there may be a place for "on chip" (as far as the enduser is concerned) voltage regulation with some of these all-in-one converter MCMs.

Re:Based on gizmag discussion, not impressed (1)

marcosdumay (620877) | more than 3 years ago | (#35346704)

The idea of using a linear regulator to save power is quite funny...

Ok, it could lead to a linear reduction of power, since the processor will have quadratic savings, and the regulator linear increases. But it is still funny.

Re:Based on gizmag discussion, not impressed (1)

Agripa (139780) | more than 3 years ago | (#35348962)

The idea of using a linear regulator to save power is quite funny...

At low enough input to output voltage differentials, linear regulators have higher efficiency than switching regulators.

Re:Based on gizmag discussion, not impressed (1)

marcosdumay (620877) | more than 3 years ago | (#35349674)

Yes. And on digital equipment that is just when you won't need any kind of regulator.

Re:Based on gizmag discussion, not impressed (1)

serbanp (139486) | more than 3 years ago | (#35352146)

A VR consumes a lot of both (relative to a microprocessor). You can easily see >5" square of space and >10W of power dissipation next to the processor (and everyone cries about it because of its location)

Totally wrong. You see, the VR's job is to transfer the power from a high(er)-voltage supply to whatever the CPU/GPU/blahblahblah needs. The switching VR's of today boast efficiencies in excess of 90%, while their load is a 0% efficient converter (everything the CPU eats gets transformed in heat). Which means that if the CPU dissipates 10W, the VR puts out no more than an additional 1.1W - peanuts. You have to design the cooler for the bigger pig, what the VR puts out is not significant.

As for the FA, the guy is talking about switchers, not linear regulators. The inductors are on-chip, the capacitors are not so obvious, they may be off-chip. Other people did it before, but the efficiency of switching at 50 or 100MHz (so that a puny 10nH on-chip inductor matters) is abysmal, barely better than a linear regulator. Reading the more detailed article a fellow /.-er above had the courtesy of pointing to, it looks like everything in his work is just playing with numbers and simulators; the guy obviously has no idea what are the practical issues associated with switching regulators and efficiency.

Help (0)

Anonymous Coward | more than 3 years ago | (#35346938)

This is slightly random, but how can I get my dual Pentium D to run at lower frequencies on Linux?

Just a linear regulator? (1)

Erich (151) | more than 3 years ago | (#35347296)

Is this the classic head switch with feedback to adjust the output voltage? This kind of voltage regulator has been around for a long time, and is extremely common in embedded devices. You have the head switch there anyway for power collapse, just add some control to the gate voltage. Not terribly efficient, but you get increased R and so decreased V squared over R. Better than no regulation for small increase in area over what you had already (A big head switch).

Perhaps it's yet another case of Academia "discovering" what someone in industry figured out a long time ago...

Now if it's a easy to fabricate buck converter, it might be interesting... we have to have those off-die. But I think fabricating those capacitors and inductors isn't easy.

Just to clarify my research.. (0)

Anonymous Coward | more than 3 years ago | (#35350608)

I am Wonyoung Kim, the PhD student who designed the chip mentioned in the article. I heard my work was mentioned in slashdot and wanted to clarify several points.

- Per-core voltage control is not an old thing. Intel and AMD both do per-core frequency control, but not voltage control. Multiple cores share a single voltage in their processors. There is an opportunity for additional power savings if the voltage is controlled at a per-core basis to track per-core frequency changes.
- My design is not a linear regulator. It is a "3-level" DC-DC converter that is a hybrid between the buck and switched-capacitor converters. It uses a flying capacitor to enable a much smaller inductor than the buck, which is important for on-die integration.
- This chip is not the first to present the "3-level" design, but the first 3-level converter to integrate everything (including inductors and capacitors) on a single die.
- Fully integrated DC-DC converters can enable nanosecond-scale, per-core voltage control while not adding board-level components.

Feel free to send me any questions if you are curious to hear more details.
You can find my email by googling "wonyoung kim harvard".

Re:Just to clarify my research.. (0)

Anonymous Coward | more than 3 years ago | (#35352398)

Per-core voltage control is not an old thing. Intel and AMD both do per-core frequency control, but not voltage control. Multiple cores share a single voltage in their processors. .

Bullshit. Already 6 years ago, I (as well as other competing IC manufacturers) was designing VR controllers with split planes for the dual-core Athlon. Each core was capable of independently slewing its supply voltage and, obviously, this voltage change happens before the CPU throttles its clock.

Just to clarify my research.. (1)

wonyoungkim (2006608) | more than 3 years ago | (#35350938)

I am Wonyoung Kim, the PhD student who designed the chip mentioned in the article. I heard my work was mentioned in slashdot and wanted to clarify several points. - Per-core voltage control is not an old thing. Intel and AMD both do per-core frequency control, but not voltage control. Multiple cores share a single voltage in their processors. There is an opportunity for additional power savings if the voltage is controlled at a per-core basis to track per-core frequency changes. - My design is not a linear regulator. It is a "3-level" DC-DC converter that is a hybrid between the buck and switched-capacitor converters. It uses a flying capacitor to enable a much smaller inductor than the buck, which is important for on-die integration. - This chip is not the first to present the "3-level" design, but the first 3-level converter to integrate everything (including inductors and capacitors) on a single die. - Fully integrated DC-DC converters can enable nanosecond-scale, per-core voltage control while not adding board-level components. Feel free to email me any questions if you are curious to hear more details.
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