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High-Performance Monolithic Graphene Transistors Created

samzenpus posted more than 2 years ago | from the fresh-out-of-the-lab dept.

Hardware 99

MrSeb writes "Hardly a day goes by without a top-level research group announcing some kind of graphene-related breakthrough, but this one's a biggy: Researchers at the University of Erlangen-Nuremberg, Germany have created high-performance monolithic graphene transistors using a simple lithographic etching process. This could be the missing step that finally paves the way to post-silicon electronics. In theory, according to early demos from the likes of IBM and UCLA, graphene transistors should be capable of switching at speeds between 100GHz and a few terahertz. The problem is, graphene doesn't have a bandgap — it isn't a natural semiconductor, like silicon — and so it is proving very hard to build transistors out of the stuff. Until now! The researchers say that current performance "corresponds well with textbook predictions for the cutoff frequency of a metal-semiconductor field-effect transistor," but they also point out that very simple changes could increase performance 'by a factor of ~30.'"

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This could have been first post... (0, Funny)

Anonymous Coward | more than 2 years ago | (#40695777)

...if I had a graphene-transistor-based computer.

Hype ? (3, Insightful)

Taco Cowboy (5327) | more than 2 years ago | (#40695779)

... they also point out that very simple changes could increase performance 'by a factor of ~30

 
Excuse me but I begin to sense hype
 

Re:Hype ? (0)

Anonymous Coward | more than 2 years ago | (#40695827)

Could indeed be hype, but tfa (yes, I read it, sorry about not following /. tradition) does not really say what the perfomance is as far as I can tell. So, unknown performance * 30 does not sound so impressive.

Re:Hype ? (1)

Anonymous Coward | more than 2 years ago | (#40695873)

It's pretty much a SiC NMOS FET with graphene as gate/source/drain "metal", a far stretch from a graphene transistor.

Re:Hype ? (3, Interesting)

Canazza (1428553) | more than 2 years ago | (#40695889)

Any increase in performance without reducing size is a step forwards.
If speed increases, for example, we'd go from 4GHz to 120GHz, which is at the low end of the scale mentioned in the summary (ie, it goes up to a few Terahertz in theory)
So we'd be at the start of a whole new clock speed race.

Re:Hype ? (2)

arth1 (260657) | more than 2 years ago | (#40696133)

Any increase in performance without reducing size is a step forwards.

There are other important factors, like reliability, power consumption, noise and costs.

clock skew? (4, Interesting)

martyb (196687) | more than 2 years ago | (#40696229)

Any increase in performance without reducing size is a step forwards.If speed increases, for example, we'd go from 4GHz to 120GHz, which is at the low end of the scale mentioned in the summary (ie, it goes up to a few Terahertz in theory)So we'd be at the start of a whole new clock speed race.

That sounds great, but at those speeds the distance traveled per tick gets *much* smaller. I see a challenge in trying to propogate(sp?) a clock signal across the chip to have things work in concert with each other. I'm more a software guy than HW so I may be missing something obvious? ISTR an article here about a year or two ago about clockless logic. Would we need something like that in order to make a modern CPU out of this tech?

tl;dr How do you keep the clock from getting skewed up?

Re:clock skew? (1)

tom17 (659054) | more than 2 years ago | (#40696301)

I guess lots of 'serial' busses inside the chip. It works very well outside the chip where clock speeds have exceeded the timing possibilities of circuit-board-length traces. Maybe that will scale down to die-lenght-traces...

Re:clock skew? (4, Informative)

Alioth (221270) | more than 2 years ago | (#40698101)

To avoid clock skew, you regenerate the clock. You can use a phase locked loop to sync to another clock, and generate a new clock signal synced with this clock but with an adjustment to the phase.

The FPGA that I use has methods for dealing with clock skew, the Xilinx app note describes how you can deal with it:

http://www.xilinx.com/support/documentation/application_notes/xapp462.pdf [xilinx.com] ...see from page 26 "Clock skew, the performance thief" and "Make it go away!"

Presumably when an ASIC has a similar problem, a similar approach is taken. (Disclaimer: I have zero experience with ASICs).

Memory/Cache Access delays? (2)

martyb (196687) | more than 2 years ago | (#40702013)

To avoid clock skew, you regenerate the clock. You can use a phase locked loop to sync to another clock, and generate a new clock signal synced with this clock but with an adjustment to the phase.

That makes sense! Thanks for the reply!

P.S. Editors - Please, more articles like this one! I *really* appreciate having a chance to ask questions, and learn from, experts in the field instead of relying upon dumbed-down, PR fluff pieces.

Re:clock skew? (1)

Asmodae (1155077) | more than 2 years ago | (#40704029)

We're already here essentially at standard PCB sizes, and very close for chips. At C (which electrical signals don't get to), you're pretty limited. This doesn't even account for things like rise-time, frequency dependent effects on resistance/capacitance, etc. For lots of grimy details: Modeling of semiconducter Interconnects [rpi.edu] . Full disclosure, I went to RPI, but this just happened to be the first paper I googled.

Clock regeneration works for chip-to-chip or device-to-device clocking, but those clocks also usually aren't run as fast as dedicated on-die chip clocks (note: this is the difference between bus clocks and chip clocks on modern motherboards). When you have complete control of your clock tree on a single device, it's laid out so that it is as balanced as possible from the source. i.e. the routing delays are the same to every device the clock is interacting with, this is a balanced clock tree.

As clock frequencies go up and feature sizes shrink, we'll see more asynchronous independent sub-system on the same chip. But it's a hard problem, with lots of compromises, and that asynchronous circuitry takes up space and power. And even if the transistor can switch fast enough, a digital signal has rise time, settling time, etc. that all need to be accounted for and affect the design. At the frequencies we're talking about, it's just as much microwave/rf engineering as it is digital.

Re:clock skew? (1)

Anonymous Coward | more than 2 years ago | (#40698115)

Clock mesh technology produces a much lower clock skew compared to a conventional clock tree and, more importantly, is inherently OCV tolerant. On-chip variations (OCV) derated clock mesh designs generally have both lower skew and higher performance than clock tree designs.

source: http://www.design-reuse.com/articles/21019/clock-mesh-benefits-analysis.html

Re:clock skew? (1)

martyb (196687) | more than 2 years ago | (#40702613)

Clock mesh technology produces a much lower clock skew compared to a conventional clock tree and, more importantly, is inherently OCV tolerant. On-chip variations (OCV) derated clock mesh designs generally have both lower skew and higher performance than clock tree designs. source: http://www.design-reuse.com/articles/21019/clock-mesh-benefits-analysis.html [design-reuse.com]

Many thanks! Great article! Looks like getting the clock signal across the chip is an understood problem.

Which leads me to a question I'm not sure how to phrase, so please bear with me. At a high level, there's "data" and there's "processing". It seems to me that as we crank up the clock rate, latencies in accessing the data can be problematic unless the data is "nearby" I recall that Intel was working on Knight's (bridge? landing? something-or-other) which had lots of smaller cores on one die. IOW, it gets the processing and the data closer together. Is that the shape of things to come? What other technologies, if any, are available to keep the flow of processing at its peak?

Thanks again for the clock mesh info!

Re:clock skew? (1)

johanwanderer (1078391) | more than 2 years ago | (#40702539)

That sounds great, but at those speeds the distance traveled per tick gets *much* smaller. I see a challenge in trying to propogate(sp?) a clock signal across the chip to have things work in concert with each other. I'm more a software guy than HW so I may be missing something obvious? ISTR an article here about a year or two ago about clockless logic. Would we need something like that in order to make a modern CPU out of this tech?

tl;dr How do you keep the clock from getting skewed up?

As some point, they will probably use asynchronous signalling [wikipedia.org] . Otherwise, probably 99.99% of the power consumption will be in the clock circuits.

I believe Sun was going to have some async units [theregister.co.uk] in their Sparc processors. Not sure what happens to them.

Re:clock skew? (0)

Anonymous Coward | more than 2 years ago | (#40704241)

How do you keep the clock from getting skewed up?

Find a better way to distribute clock then. For example, a flashing light above the chip, and photosensitive clock transistors. No need for an electronic clock signal, when an optical will do.

You mean FTL? (2)

Hentes (2461350) | more than 2 years ago | (#40696469)

With the current size, that would be quite a huge step forwards, considering that light travels about 7.5cm during a 4GHZ tick. The main limit in frequency isn't the speed of transistors, but the speed of light.

Re:You mean FTL? (2)

gestalt_n_pepper (991155) | more than 2 years ago | (#40696805)

And DON'T change the speed of light or otherwise, all the timing circuits will be off and I'll have to reboot the servers *every* day to get the time sync right.

Re:Hype ? (1)

Joce640k (829181) | more than 2 years ago | (#40697457)

Any increase in performance without reducing size is a step forwards.
If speed increases, for example, we'd go from 4GHz to 120GHz

Not without making the electrical pathways an awful lot shorter...

Re:Hype ? (3, Informative)

camperslo (704715) | more than 2 years ago | (#40697843)

Of course the characteristics that matter depend on the application. For a processor, fast switching is desirable, with low leakage in the off state, a low saturated resistance in the on state, low input capacitance, low capacitance from the output to the input etc. Additionally when there are devices in series across the supply, the characteristics should be such that a spike of current is avoided during switching.
The input capacitance is important since it takes current to charge and discharge it, increasing the drive power requirements as the operating frequency rises.

The nature of the input/output transfer function between on and off is very important to linear applications, such as audio, instrumentation, r.f. receiver circuits, linear r.f. power amplifiers etc. Low noise characteristics may also be sought. Those things are important to wireless communications and networking.

In power applications, things like the temperature coefficient of the saturated on resistance become important. Devices with a positive temperature coefficient may have potential problems with thermal runaway since losses and heat then boost each other. When building power devices, shifts in saturated on resistance, switching threshold, and gain with temperature are all important. If a portion of the transistor tends to draw more current when heated, the portion of the chip that conducts first, or that which has the least effective cooling, may tend to hog a disproportionate amount of the current, further increasing the temperature at the hotter spot. The safely handled power level is reduced when the current density is less uniform. Those sorts of characteristics make some existing types of power FETs that are fine for switching more failure prone in something like a linear audio power amplifier. When geometries are very small and current densities are high, metal migration from interconnects may occur possibly leading to eventual failure.

The effective thermal resistance is also important. Like electrical resistance which develops a voltage drop (or rise if you prefer) when current flows, thermal resistance develops a temperature rise with heat flow. Usually expressed units of temperature rise in degrees C per Watt, the junction to package surface, package surface to heatsink (pad), and heatsink to ambient thermal resistances are additive. The temperature rise across those combined resistances must be such that a maximum safe junction temperature is not exceeded. The heatsink to ambient thermal resistance can be reduced with a fan, but if thermal conductivity within the chip/package is poor, power handling ability is less than it would be otherwise. It's usually more difficult to achieve low thermal resistance with faster devices since they're generally smaller. A low speed power transistor with a large chip generally has lower thermal resistance than a fast one with a small chip. (smaller may reduce carrier transit times and capacitance). Of course smaller transistors usually reduce cost since more can be produced in a given size die, but process costs and yield are also factors. (and licensing fees?)

From the above it should be apparent that developing optimal devices for a given application is an involved art. It will be interesting to see which devices can see improved performance from use of graphene technology.

Marketing-speak tends to lie or at least mislead. Although the amount to data to/from memory goes up when the path gets wider, that iisn't increasing the rates the individual data lines are clocked at. So while it is reasonable to talk of so many gigabits per second memory bandwidth, it's isn't a memory clock in the GHz. When the data path got wider, some multiplied the frequency of the memory clock by the path multiplier to inflate the advertised number, but the signals are still at a few hundred MHz, not those high numbers. And even then, if wait states are needed, the effective memory clock is much less yet. Usually only a small amount of cache runs at high speeds. Even if the memory really was much faster, it becomes very difficult to design busses and board layouts at much higher speeds. In practice, if those many GHz speeds are achieved, it'll likely be mostly confined to within the CPU. That's great for encryption and complex codecs, if the related data can be moved fast enough. Can these transistors be used for higher-speed memory that doesn't use too much energy? (I refrain from calling it efficient, since essentially ALL of the power becomes heat)

Time will tell what useful products these transistors can actually improve. Since there are many problems to solve to ship successful products, we should be cautious of excessive hype.

Re:Hype ? (2)

justforgetme (1814588) | more than 2 years ago | (#40696023)

Well, the switch speeds are immense compared to classical silicon based chips. I don't know about the production process they are using but if they manage to fabricate them with comparable etching resolution to the normal chips or just keep transistor count equal then the performance difference should be very near the clock difference.

Re:Hype ? (2)

justforgetme (1814588) | more than 2 years ago | (#40696065)

Ok, according to TFA (not that big one actually) the production process is 100k nanometers so it should be about 2000 times bigger to the current i7's transistors at 45nanometers. Of course the 45nm production process does not actually measure transistor size so this is completely useless and misleading....

Re:Hype ? (1)

nedlohs (1335013) | more than 2 years ago | (#40697571)

Why? Sounds like bog standard scientific research/publishing to me.

Scientist A: If we did X we would probably get a factor of 30 performance boost.
Scientist B: Great, but first publish what we have, that way we get 2 publications out of it.
Scientist A: Better put it in the "future work" in case someone else beats is to it.

Of course actually checking the paper indicates that isn't actually the case, and it is a much more specific claim than that sentence indicates:

As the device is a unipolar field-effect transistor, it is expected to switch fast. Although our design did not target high-frequency operation (for example, we used large contact pads, conductive substrate), we measured the AC response ID(f) when a sinusoidal voltage VTG(f) was applied to the top-gate. No significant damping/phase shift and no signal distortion was observed up to 1 MHz. This observation corresponds well with textbook predictions for the cutoff frequency of a metal-semiconductor field-effect transistor (at which the AC gate current ITG is equal to the drain current ID): fT = (g/2.pi.CTG) = 0.3Mhz . Here g is the transconductance, which is extracted from the transfer characteristics of our device at room temperature, and CTG, the capacitance of the top-gate. In our proof-of-concept layout, the area that contributes to CTG is unnecessarily large as it includes the bond pad of the gate structure. As the simplest example for a design improvement, we could use semi-insulating SiC for the peripheral regions of the transistor (for example, by vanadium implantation). This should reduce CTG and consequently fT is supposed to increase by a factor of ~30. The route for further speed improvements is obvious: optimization and shrinkage of the geometry, reduction of source, drain resistances, and so on.

Re:Hype ? (1)

subnomine (849148) | more than 2 years ago | (#40698649)

I do feel hyped. I wish there wasn't an article every week promising new wonders that if they ever come to pass I've long forgotten about them. I love it when technology simply comes to market and POW, suddenly we all have megapixel cameras on our cell phones... The industry didn't blah-blah about that for years.

Re:Hype ? (1)

saveferrousoxide (2566033) | more than 2 years ago | (#40766517)

Why would you say that?

Until now!

But wait there's more!

very simple changes could increase performance 'by a factor of ~30

And if you order now, we'll throw in this FREE graphene infused chamois!
Wash and wax your car with one wipe, and when you squeeze out the water: unicorn tears!

graphene vs post-silicon (5, Insightful)

nosh (213252) | more than 2 years ago | (#40695799)

Just because graphene might became useable does not mean it will replace silicon.

Silicon has quite some head start, so might survive the alternatives quite some time even in those use cases where alternatives are bette (just like it happened with spinning hard discs as storage medium, or explosion engines for cars).

And likely it has quite some downsizes that make it unfit for many purposes where silicon shines. Have they for example solved the problem of graphene to always need some current? Being able to build ultra-fast chips is nice, but if there is no way to reduce power usage of parts currently usused that might make it unfit for all but nieche markets. (Well, high-performance needing nieche markets and gamer's PC most likely).

Re:graphene vs post-silicon (5, Funny)

Chrisq (894406) | more than 2 years ago | (#40695819)

Just because graphene might became useable does not mean it will replace silicon.

What about when we run out of sand!

I laughed (0)

Anonymous Coward | more than 2 years ago | (#40695911)

I see what you did there.

Re:graphene vs post-silicon (1)

Dr. Azrael Tod (1084911) | more than 2 years ago | (#40695943)

by this time, we will have run out of carbon too..

Re:graphene vs post-silicon (5, Funny)

maroberts (15852) | more than 2 years ago | (#40696159)

by this time, we will have run out of carbon too..

There are at least 7 billion sources of carbon at the moment, and that's just the bipedal ones.

Re:graphene vs post-silicon (0)

Dr. Azrael Tod (1084911) | more than 2 years ago | (#40696207)

What about when we run out of sand!

by this time, we will have run out of carbon too..

There are at least 7 billion sources of carbon at the moment, and that's just the bipedal ones.

Oh what a genius you are! You just solved the Problem!

Re:graphene vs post-silicon (3, Funny)

piekarski (67612) | more than 2 years ago | (#40696243)

Graphene is people!!!!

Re:graphene vs post-silicon (5, Funny)

RaceProUK (1137575) | more than 2 years ago | (#40696285)

Soylent Graphene?

Re:graphene vs post-silicon (4, Funny)

Big Hairy Ian (1155547) | more than 2 years ago | (#40696381)

A mod point

A mod point

My [Insert cloud provider] for a mod point :b

Re:graphene vs post-silicon (1)

gestalt_n_pepper (991155) | more than 2 years ago | (#40696823)

Soylent Green chips are People!

Re:graphene vs post-silicon (1)

camperslo (704715) | more than 2 years ago | (#40699577)

There are at least 7 billion sources of carbon at the moment, and that's just the bipedal ones.

Wake me up when you've figured out how to seed the atmosphere with a catalyst that converts CO2 and sunlight to oxygen and a rain of transistors.

Re:graphene vs post-silicon (2)

mcgrew (92797) | more than 2 years ago | (#40701115)

There are quite a few more than 7 billion. You forgot birds, kangaroos, and I probably forgot even more.

Re:graphene vs post-silicon (1)

maroberts (15852) | more than 2 years ago | (#40707639)

There are quite a few more than 7 billion. You forgot birds, kangaroos, and I probably forgot even more.

Which part of "at least" did you miss? There is a reasonable estimate for humans; birds, kangaroos, monkeys etc don't get counted regularly

Re:graphene vs post-silicon (1)

Areyoukiddingme (1289470) | more than 2 years ago | (#40705981)

Dr. Neil DeGrasse Tyson is fond of pointing out that there is 4 times as much carbon in the universe as there is silicon. It's his argument for why science fiction that postulate silicon-based life is kind of reaching. Life is most likely to evolve carbon-based because there's a lot more of it and carbon forms more molecules than any other element, silicon included.

So no, when we run out of sand, we'll still have lots more carbon available.

Re:graphene vs post-silicon (1)

Dr. Azrael Tod (1084911) | more than 2 years ago | (#40708289)

So no, when we run out of sand, we'll still have lots more carbon available.

you asume that we burn through both ressources at equal speed. (ok, we don't reduce either but if we count 'we use it' i am pretty sure we would need more carbon-based material then we use silicon-based material)

Re:graphene vs post-silicon (3, Informative)

art6217 (757847) | more than 2 years ago | (#40695867)

they for example solved the problem of graphene to always need some current? Being able to build ultra-fast chips is nice, but if there is no way to reduce power usage of parts currently usused

Many algorithms are serial. A few thousand terahertz transistors might be just enough for them. And if such an algorithm needs a lot of data, a silicone memory around might be sufficient as well.

If you have a terahertz transistor, it will very likely find an application in computing, even if it would use 1mW when being idle.

Re:graphene vs post-silicon (0)

Anonymous Coward | more than 2 years ago | (#40695937)

High-frequency trading. (Unfortunately.)

Re:graphene vs post-silicon (0)

amorsen (7485) | more than 2 years ago | (#40695949)

Please, silicon not silicone.

Re:graphene vs post-silicon (2)

art6217 (757847) | more than 2 years ago | (#40696051)

why not? it would be bump--resistant (thanks for the correction)

Re:graphene vs post-silicon (2)

Gr8Apes (679165) | more than 2 years ago | (#40697191)

or bump enhancing...

Re:graphene vs post-silicon (1)

inasity_rules (1110095) | more than 2 years ago | (#40696075)

Easy use is a fast DSP or AD converter. Also DA converters will benefit. Basically we could make such things cheaper and simpler if transistors were faster. Imagine a sampling period in the Terahertz. Useful things even if they don't end up in x86 architecture.

Re:graphene vs post-silicon (1, Informative)

meta-monkey (321000) | more than 2 years ago | (#40697519)

If you need a terahertz sampling rate, your signal must be in the 500GHz range. Nyquist Sampling Theorem [wikipedia.org] . I don't think we can hear 500GHz sounds so well.

Re:graphene vs post-silicon (1)

inasity_rules (1110095) | more than 2 years ago | (#40697891)

Who said anything about audio?

Re:graphene vs post-silicon (1)

Alioth (221270) | more than 2 years ago | (#40698189)

I can't hear 100MHz sounds so well, but my digital storage oscilloscope can. Sampling isn't just for sound.

Re:graphene vs post-silicon (1)

inasity_rules (1110095) | more than 2 years ago | (#40699299)

I'm still looking for a digital oscilloscope that can beat a good analogue one... At the same price that is. Maybe if this sort of transistor takes off, I'll get one...

Re:graphene vs post-silicon (1)

art6217 (757847) | more than 2 years ago | (#40700233)

...and it will turn out to be too slow, because this sort of transistors took off. Fortunately, Doppler effect oscilloscopes will be on the way.

Re:graphene vs post-silicon (1)

inasity_rules (1110095) | more than 2 years ago | (#40700389)

Doppler oscilloscopes? I'll take 2....

Re:graphene vs post-silicon (1)

OldDogOldTricks (1148757) | more than 2 years ago | (#40698225)

A/D and D/A are used for many applications and signals other than audio. Software radios and image processing come to mind.

Re:graphene vs post-silicon (0)

Anonymous Coward | more than 2 years ago | (#40699159)

Idiot.

Re:graphene vs post-silicon (1)

Decker-Mage (782424) | more than 2 years ago | (#40706779)

There are lot of applications for the near-terahertz and terahertz band that have nothing to do with audio but an awful lot of mixing/amplification in receiver front-ends and the intermediate stages. The current components are difficult to build and so far there has been a lot of cut-and-try. It's not my field but I can appreciate the difficulties and expenses involved.

One thing I do wonder about is how/whether the graphene still acts as a extremely good conductor of heat and how to take advantage of it during fabrication if this is still true. I'd probably understand the answer, but again this isn't one of my fields.

Re:graphene vs post-silicon (4, Insightful)

Anonymous Coward | more than 2 years ago | (#40695899)

Have they for example solved the problem of graphene to always need some current?

They didn't.
The active semiconductor here is SiC, the graphene is only acting as a plain conductor.
This is as much a graphene transistor as a MOSFET is a aluminium transistor.

Re:graphene vs post-silicon (1)

flyingfsck (986395) | more than 2 years ago | (#40696331)

You seem to be the only other person that actually read the article and understand it. This is a pure BS marketing transistor.

Re:graphene vs post-silicon (3, Informative)

MattskEE (925706) | more than 2 years ago | (#40704361)

It's a SiC MESFET with graphene gate. It's interesting in that the SiC is the source of C for the graphene, and they use two different growth methods to form a schottky barrier contact for the gate and an ohmic contact for the source and drain. But that's all the graphene is doing is making contacts. Maybe these are really good contacts, but it will still be limited in performance in terms of the gate length and SiC channel material parameters, which are actually pretty good but it's not a graphene transistor at all.

These hype articles about Graphene fail to mention that conventional highly scaled CMOS processes have cutoff frequencies in the 100's of GHz already, but that's not a metric that relates well to the clock speed of a large digital chip, although it helps. Other very important factors include how tightly you can pack things, getting low-resistance low-capacitance interconnet, and managing FET to FET variability over millions/billions of transistors. These latter factors have a bigger impact on clock speed than the transistors themselves.

I haven't read much of the latest on graphene transistors but the last ones I saw didn't come close to state of the art silicon, and their off-state current is very high because of the bandgap issue. You can make a bandgap in various ways such as sandwiching the graphene in various materials or making it into small strips but these tend to reduce the high mobility that made graphene so fascinating. I'm sure we'll see some interesting stuff come out of it but most of the press on graphene is the hype that researchers have to do to get funding.

BRING BACK FILE CONTROL BLOCKS !! (-1)

Anonymous Coward | more than 2 years ago | (#40695809)

I want my CP/M !! I want my "KBs" !! I want my "16 color graphics" !! I want INT 10 !! I want INT 13 !! I wany my TSRs !! I want to be graphene-free !!

Re:BRING BACK FILE CONTROL BLOCKS !! (3, Funny)

Chrisq (894406) | more than 2 years ago | (#40695835)

I want my CP/M !! I want my "KBs" !! I want my "16 color graphics" !! I want INT 10 !! I want INT 13 !! I wany my TSRs !! I want to be graphene-free !!

I want my graphene in my pencil. I want my pencil in a small leather case along with my sliderule and my log tables.

Re:BRING BACK FILE CONTROL BLOCKS !! (5, Insightful)

sensei moreh (868829) | more than 2 years ago | (#40696283)

Why carry around log tables when you've got a slide rule? Doesn't your slide rule have an L scale?

Re:BRING BACK FILE CONTROL BLOCKS !! (0)

Anonymous Coward | more than 2 years ago | (#40696463)

No, he is still using the iSlide1.

Re:BRING BACK FILE CONTROL BLOCKS !! (4, Informative)

Celarent Darii (1561999) | more than 2 years ago | (#40697501)

Log tables were needed for more precision. Slide rules usually would go only to 4 digit, while a good table could put you up to 7 digits, though carrying around that 200 pages was a bit cumbersome. Plus your tables often had sine,cos and other functions.

Now I feel old.

Re:BRING BACK FILE CONTROL BLOCKS !! (0)

Anonymous Coward | more than 2 years ago | (#40700049)

my slide rules have trig scales too. But yes, only 4 digits.

Re:BRING BACK FILE CONTROL BLOCKS !! (1)

jamiesan (715069) | more than 2 years ago | (#40697963)

Log tables would be too heavy to carry around, and probably hard to fit into a leather case.

SiC transistor? (1)

nbsr (2343058) | more than 2 years ago | (#40695815)

It looks like a SiC MOS transistor, with electrodes (D, G, S) made out of graphene rather than metal or polysilicon. Does it really make that much difference in performance over regular MOS transistors? If so, how much of the performance gain comes from the semiconductor material (SiC vs. Si) and how much from the interconnections? How multiple layers of interconnections are handled, if at all?

Something missing in the explanation (5, Interesting)

Required Snark (1702878) | more than 2 years ago | (#40695855)

I read the article (I know it's not considered good form here on Slashdot), and there seems to be a discrepancy: this is described as being a graphene transistor, but the gate uses silicon carbide as the semiconductor. So it seems like a better description would be a hybrid graphene/semiconductor transistor. Is this correct?

If it is a hybrid then what are the limitations and how is it better then current all semiconductor circuits? As far as I know (not very much) there is no reason to build silicon carbide integrated circuits, so why would anyone want to use SIC with graphene? Is this a step to something more useful?

I'm not trolling, I just want to get a better understanding.

Re:Something missing in the explanation (4, Interesting)

zrbyte (1666979) | more than 2 years ago | (#40695907)

Exactly the channel is SiC, while the interconnects are graphene. so in this sense it's using graphene, but it's not a transistor which uses graphene as the channel material. Previous work that has been cited in the Extremetech article is a graphene channel transistor. So there's a bit of a mix up.
It is a significant step, but this is in no way revolutionary as the summary implies. Revolutionary would be to induce a band gap in graphene, while keeping it's extremely high mobility for fast switching and using that as the channel material.

Re:Something missing in the explanation (1)

YoopDaDum (1998474) | more than 2 years ago | (#40696027)

Do you (or anyone here) know about the power consumption when the transistor switches and how it compares to a silicon transistor? Today on silicon the frequency is often limited by power consumption / thermal considerations. In other words, we know how to go faster on silicon but we don't. If graphene is faster but not more power efficient, then it could limit it's use to the few applications where power / thermal are not a constraint. If it's more efficient, but not much, that could also limit the speed gain (power increases linearly with the frequency). So it seems the power efficiency is key, but I haven't seen anything about that (not that I've searched either, but at least I've RTFA ;).

Re:Something missing in the explanation (4, Informative)

zrbyte (1666979) | more than 2 years ago | (#40696195)

Firstly, why is graphene "faster". This is mainly due to the large mobility [wikipedia.org] of electrons and holes in the material. Furthermore, (I'm not sure here) the fact that the channel is only 1 atom thick, means that switching the transistor from one state to the other should be very fast [nature.com] .
With graphene, the problem is the lack of a band gap. This means that there is always a current flowing through the device no matter which state it's in (on or off, corresponding to 1 or 0). This is a major drawback if you want to make digital transistors out of them, because the device will always draw power no matter what. Ideally you would want the device to have zero or close to zero current flowing through it in one state and have current flow in the other state. So in order to make a power efficient "digital" transistor from graphene you would need to somehow induce a band gap in the material. There are various ways to do this but none have provided the "breakthrough" the summary mentions.
In some cases graphene transistors could be used, for example analog devices, where the above mentioned issues are not problems. This is the case of the 100 GHz transistors that the article mentions.
The issue of dissipating heat should be quite different in the case of graphene, because of the materials very good heat transport properties.

Re:Something missing in the explanation (0)

Anonymous Coward | more than 2 years ago | (#40696273)

Not that I know all that much about the practicalities of silicon transistors, but is the resistive really the dominant energy loss when you're switching at >3GHz?

Re:Something missing in the explanation (1)

marcosdumay (620877) | more than 2 years ago | (#40702637)

If you use transistors that can't stop conducting, yes, resistive loss will be dominant. Things get even worse if you make your wires of one of the best conductors known (graphene).

Re:Something missing in the explanation (1)

lexman098 (1983842) | more than 2 years ago | (#40697761)

In some cases graphene transistors could be used, for example analog devices, where the above mentioned issues are not problems.

Analog circuitry in ICs require a "bandgap reference" (literally) to control bias current. Some smart engineer could provide a work-around, but it's a huge barrier.

Re:Something missing in the explanation (2, Informative)

Alioth (221270) | more than 2 years ago | (#40698253)

Actually what you want is for zero current to be flowing in one state, and zero current to be flowing in the other state, too. That's the idea behind CMOS, which apart from leakage current, current only ever flows* during the transistion from one state to the other (because while it's transitioning, both N and P channel transistors will be conducting to some degree).

* (Current may well flow in the quiescent state, if the device is being used as a switch for something through which current flows, such as an LED).

Re:Something missing in the explanation (1)

jkflying (2190798) | more than 2 years ago | (#40696209)

The consumption from the switching is due to the capacitance at the gate. This is why smaller transistors are better, smaller transistors --> smaller gate --> smaller capacitance --> less switching power. Lower voltages mean the same thing, since you can use a weaker dielectric without it breaking down and thus lower the capacitance further (eg in DRAM), thereby lowering power consumption.

How about graphene? It is an extremely good conductor, and that is all, in essence making no difference at all. They still haven't figured out how to even make a bandgap with it, which means that the capacitance of whatever technology is used is essentially unknown. One aspect that might help, because of the high conductivity, is that we could make the circuit tracks thinner (eg just one layer of atoms thick), which could reduce inter-track capacitance. The actual capacitance at the gate, however, is still a complete unknown.

Re:Something missing in the explanation (2)

nbsr (2343058) | more than 2 years ago | (#40696323)

To answer that we'd first need a working graphene transistor, and the one described in the TFA is not.

The issue currently limiting performance/watt is transistor transconductance (gain), which for bipolar transistors (at room temperature) is 1decade of output current per 60mV of input voltage change, for MOS (in subthreshold) 1decade/(80~120mV) and significantly less in saturation modes. Considering that you need ~5 decades to get ON/OFF behavior that sets the supply voltage at min. 0.5V, in practice twice as much because of variability and lower conductance in saturation. So, at least for high performance circuit, we are stuck with ~1V supply voltage and that's pretty much the end of (fast) performance scaling in CMOS.

To get better performance/watt we'd need a device that has some sort of a positive feedback based switching mechanism (breakdown, avalanche etc), which could exceed the 1decade/60mV limit. I'm not sure if we'd get that from graphene. Sure, low conductivity of graphene (ON resistance) helps too, as we could make the transistors smaller and that would reduce their gate capacitance but since energy is proportional to C*V^2, capacitance has much less effect than the voltage.

Re:Something missing in the explanation (0)

Anonymous Coward | more than 2 years ago | (#40696335)

Revolutionary would be to induce a band gap in graphene,

Dope it with Si?
(ducks)

Re:Something missing in the explanation (0)

Anonymous Coward | more than 2 years ago | (#40695975)

"and how is it better then"

Better THAN.

Re:Something missing in the explanation (5, Informative)

sheepe2004 (1029824) | more than 2 years ago | (#40696033)

I read the article (I know it's not considered good form here on Slashdot), and there seems to be a discrepancy: this is described as being a graphene transistor, but the gate uses silicon carbide as the semiconductor. So it seems like a better description would be a hybrid graphene/semiconductor transistor. Is this correct?

If it is a hybrid then what are the limitations and how is it better then current all semiconductor circuits? As far as I know (not very much) there is no reason to build silicon carbide integrated circuits, so why would anyone want to use SIC with graphene? Is this a step to something more useful?

I'm not trolling, I just want to get a better understanding.

Yes. They have only used graphene for the gates and contacts, not the channel itself, so a hybrid graphene/SiC transistor would probably be a better description.

As for advantages over existing technology: as far as I know the switching speed is dependent on the channel material, NOT the gate etc. So these transistors will (afaik) be no faster than a normal SiC transistor. All the hyperbole about graphene transistors being is only in the linked news article and not in the paper. In fact the final conclusion of the paper is:

The concept's particular strength, however, lies in the following property: within the same processing steps, many epitaxial graphene transistors can be connected by graphene strip lines along with graphene resistors and graphene/SiC Schottky diodes, and therefore complex circuits can be built up. As a special feature of graphene in contrast to semiconductors, we anticipate that even a complete logic is feasible.

On the other hand this is still interesting for other reasons:
1) They have demonstrated large scale integration of graphene. If we can get a bandgap in graphene without sacrificing too much mobility then combined with this kind of work we have a complete graphene chip.
2) Another thing they emphasise in the paper is the simplicity of the lithography process. Simpler lithography means it's easier to go smaller. Smaller features = better chips.

TL;DR - the news article is bullshit, the real result is interesting but not revolutionary (yet).

seems silicon transistor with graphene contacts? (0)

Anonymous Coward | more than 2 years ago | (#40696541)

This seems to me like a silicon transistor with graphene contacts..

Re:Something missing in the explanation (0)

Anonymous Coward | more than 2 years ago | (#40696253)

Well the article also says that they have evacuated the silicon from the silicon carbide. This leaves us with Graphene gates on carbide i.e. carbon and hence if the layer of silicon carbide is thin enough than the carbon in it is mono layer which equals graphene?

All this to say that i hope the article isnt "just" hype.

Monolithic Graphene (1)

Anonymous Coward | more than 2 years ago | (#40695919)

Immediately it came to mind the image of the large black monolith in Artur C. Clarke's "2001" novel series...

Natural semiconductor? (1)

Anonymous Coward | more than 2 years ago | (#40696333)

".... it isn't a natural semiconductor, like silicon ..."

Silicon, in its pure state, is an insulator. It only becomes a semiconductor when imputities are added to it.

Yes, but... (0)

nicomede (1228020) | more than 2 years ago | (#40696599)

Will it run Linux?

Wow, you mean... (1, Funny)

gestalt_n_pepper (991155) | more than 2 years ago | (#40696785)

Windows will finally run at acceptable speed?

Re:Wow, you mean... (1)

Vermonter (2683811) | more than 2 years ago | (#40697561)

No, Microsoft will see the increased speed as a chance to add even more bloat to it's operating systems, essentially negating any clock speed increases.

Re:Wow, you mean... (0)

Anonymous Coward | more than 2 years ago | (#40699367)

If you want your PC to run faster press the power button to turn it on.

Re:Wow, you mean... (2)

cowboy76Spain (815442) | more than 2 years ago | (#40705149)

Windows will finally run at acceptable speed?

Unfortunately, this will happen in the Year of the Linux Desktop so we will not be able to notice.... :-p

Interpret that as you like.

we're going to need it (Sqore 100,000Ghz, Super) (0)

Anonymous Coward | more than 2 years ago | (#40696787)

We're going to need it when Windows 9 hits the streets with that Metro nonsense.

CAPTCHA = matched

Link to article (nature paper) (3, Informative)

Anonymous Coward | more than 2 years ago | (#40696793)

http://www.nature.com/ncomms/journal/v3/n7/full/ncomms1955.html

It's open access (free).

Why the hell does this get linked to "extreme tech" instead of the realFA?

Monolithic (1)

rossdee (243626) | more than 2 years ago | (#40697369)

Black rectangular with relative dimensions 1:4:9

Relation to Roswell UFOs (1, Funny)

scorp1us (235526) | more than 2 years ago | (#40697647)

For those of us who "want to believe" this creates some dissonance. It has been widely believed by the observant, that following the crash in Roswell, we "invented" t he germanium diode a few years later. The believers associate the two events as causal. That is we reverse-engineered semi-conductor technology from them. This idea has been supported by some people in the "industry" that the crash was not cleaned up (allegedly by high-up grays or even reptilians) so that we could have a chance to boost our technology. Remember at the time we were using vacuum tubes.

I'll accept the germanium diode as a crude version of a silicon diode, but this organic transistor changes everything. The only 'excuses' for aliens to not have been using this technology is that it has disadvantages when used in space or other functional limitations. For those not in the know, a transistor is two diodes attached in opposite orientations. Maybe we can accept silicon transistors as crude copies of organic ones, but the technology in the 50s would not have been up to the task of understanding what is going on. These are way too small. If however I am wrong then the reverse engineering team was really, really clever.

Re:Relation to Roswell UFOs (1)

Alioth (221270) | more than 2 years ago | (#40698463)

For those not in the know, a transistor is two diodes attached in opposite orientations

Bipolar transistors look like that, field effect transistors...well, not so much.

Re:Relation to Roswell UFOs (0)

Anonymous Coward | more than 2 years ago | (#40698831)

Please take your psychiatrically prescribed drugs, you're mindlessing babling again.

Re:Relation to Roswell UFOs (0)

Anonymous Coward | more than 2 years ago | (#40699925)

Here's a thought experiment for you. You take a modern CPU, even the "slow large crappy ones" like Intel's i7 920 processor. Yes, outdated. Old.

Now take that processor, and using nothing buy 1940s technology, reverse engineer it. Heck, duplicate it. Or even isolate one part of it.

Can't do it?

Now, imagine tech that is not 50 years ahead, but 1,000,000s of years ahead. It would be a worse comparison than giving an Athlon processor to Jesus and telling him to figure it out, as that is only 2000 years ago. And 2000 years ago they could not even reverse engineer a *light bulb* or a *capacitor*, never mind a modern ~20nm CPU.

So even assuming that Roswell was about "aliens from outer space", and assuming US military has some alien craft in their secret basis, the tech would be so out of their jurisdiction they might as well label it MAGIC, put it in a box and forget about it.

OH, and just to break your bubble,

Physicist Julius Edgar Lilienfeld filed a patent for a field-effect transistor (FET) in Canada in 1925, which was intended to be a solid-state replacement for the triode.[1][2] Lilienfeld also filed identical patents in the United States in 1926[3] and 1928.[4][5] However, Lilienfeld did not publish any research articles about his devices nor did his patents cite any specific examples of a working prototype. Since the production of high-quality semiconductor materials was still decades away, Lilienfeld's solid-state amplifier ideas would not have found practical use in the 1920s and 1930s, even if such a device were built.[6] In 1934, German inventor Oskar Heil patented a similar device.[7]

http://en.wikipedia.org/wiki/Transistor#History [wikipedia.org]

Oh well, no aliens :P

Re:Relation to Roswell UFOs (0)

Anonymous Coward | more than 2 years ago | (#40701485)

I remember reading those articles in Fortean Times. Apparently, the people who were doing the reverse engineering became depressed at realizing how far behind our technology was. When you do read stories like the Janos people and that guy who was hit by an lightning bolt from a craft, the one consistent thing that comes out was how important display system technology was. Like the best way to navigate was to have full-wall height 360 degree screens and projection systems.

Not necessarily game over for silicon (1)

Anonymous Coward | more than 2 years ago | (#40700287)

As I recall, silicene (the silicon version of graphene) does have a band-gap and is actively under development for tranisistor use. Techniques such as those in the article may benefit both camps.

I'm sure it will be ready for production... (1)

pigiron (104729) | more than 2 years ago | (#40702139)

"within ten years." ;-)

Waitaminute... (1)

Areyoukiddingme (1289470) | more than 2 years ago | (#40706099)

Since when was silicon a natural semiconductor? Silicon has to be doped before it will act like a semiconductor. If you apply power to a lump of pure silicon, nothing happens. It ignores you. The problem has been finding dopants that work in graphene, not that silicon is inherently semiconducting.

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