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Extreme Ultraviolet Chip Manufacturing Process Technology Closer To Reality

Soulskill posted about a year ago | from the finally-solved-the-sunburn-problem dept.

Hardware 49

MojoKid writes "One of the greatest obstacles standing between chip manufacturers and the pursuit of smaller, faster, processors is the lack of a proper light source. Current chips are etched using a deep ultraviolet wavelength of 193nm, but at a 28nm semiconductor process geometry, we've reached the limits of what a 193nm wavelength is small enough to etch. Extreme ultraviolet lithography (EUV) has been pegged as the most likely replacement for current 193nm technology, but repeated problems with ramping EUV have left it stalled on the runway. Now, for the first time, foundry technology developer ASML, which made headlines last year by partnering more closely with Intel and TSMC, believes it has cleared some of the hurdles between it and widespread EUV commercialization. The company predicts EUV technology could be ready for ramp by 2015. Two problems have stymied EUV deployment thus far. The first is the strength of the light source. Generating EUV at the intensities required for mass production can require as much as an order of magnitude more input power than conventional lithography. Second, there's the issue of exposure time. The two are linked — a higher-power system can etch wafers more quickly, but the power requirements could edge into the kilowatt range for each piece of equipment. The NXE:3300, which ASML is shipping this year, will be capable of hitting 125 wafers per hour, once the company boosts the light source up to 250W. That boost is still off in the future. Current NXE:3300 machines are targeting 80W by the end of the year."

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Ultraviolent (0)

Anonymous Coward | about a year ago | (#44494843)

Ahh... good old ultraviolence.

Re:Ultraviolent (0)

Anonymous Coward | about a year ago | (#44497283)

Just a touch... Just a touch.

seriously?! (2, Informative)

Anonymous Coward | about a year ago | (#44494849)

someone explain to me how this is any different to the story posted not 48 hours ago http://hardware.slashdot.org/story/13/08/05/2336251/euv-chipmaking-inches-forward

Re:seriously?! (2)

pyalot (1197273) | about a year ago | (#44495001)

It's different because it's posted 48 hours later.

Re:seriously?! (1)

Mr0bvious (968303) | about a year ago | (#44495067)

You'd think the editors would actually read slashdot - even just the titles?

Re:seriously?! (1)

TheSkepticalOptimist (898384) | about a year ago | (#44495613)

you think there are editors on Slashdot, how cute.

Re:seriously?! (1)

msobkow (48369) | about a year ago | (#44495253)

This time they didn't use the acronym in hopes of garnering more posts.

Re:seriously?! (0)

Anonymous Coward | about a year ago | (#44495333)

On the other hand, this is a much better writeup than the previous story. I actually learned something from it.

Re:seriously?! (5, Interesting)

Grey Geezer (2699315) | about a year ago | (#44495749)

Well, as a Mechanical Engineer, who is not in the chip industry, I found the explanation of the process and challenges much more understandable in this article. Monday's post was a bit too much "surely everyone already understands the details" for me. My thanks to MojoKid for the clarification.

Re:seriously?! (1)

Big Hairy Ian (1155547) | about a year ago | (#44496533)

someone explain to me how this is any different to the story posted not 48 hours ago http://hardware.slashdot.org/story/13/08/05/2336251/euv-chipmaking-inches-forward [slashdot.org]

You have to read it through a mirror whilst hanging upside down and whistling the theme tune to "I love Lucy"

Re:seriously?! (0)

Anonymous Coward | about a year ago | (#44496551)

dupe to you. I do not read SD everyday...

Re:seriously?! (1)

jphamlore (1996436) | about a year ago | (#44498583)

The difference is night and day in the summaries at least. Reading the summary of the first story, one would conclude that progress is as much dependent on a group of companies funding ASML, that the cost is a major factor forcing companies to pool their efforts, and that as a result the number of major players at the leading edge is likely to stay small but stable. It is also highly unlikely one company alone can leapfrog the others for a major length of time, although say Intel can spend a lot of money to get a couple of years advantage. The second summary mentions TSMC and Intel but carefully leaves out the other company that has made the news with a major investment in ASML, Samsung [forbes.com] . But emphasizing that Samsung is going to stay at the cutting edge of fab technology, especially with its rumored deal with Apple to be the fab for Apple's next generation of chips starting in 2015, would call into question just how important is the patent battle between Apple and Samsung, when in reality Apple and Samsung are stuck in this marriage funding the next generation of fabs.

Dupe (1)

Anonymous Coward | about a year ago | (#44494853)

Is this really needed here again? Same source, different article.

Re:Dupe (0)

Anonymous Coward | about a year ago | (#44494949)

Is this really needed here again? Same source, different article.

Yeah, the news is: this time the source will not be boosted, but busted.

Dupe! (1)

Anonymous Coward | about a year ago | (#44494857)

Dupe! [slashdot.org]

Dupe (1)

Anonymous Coward | about a year ago | (#44494859)

From the department of redundancy department.

EUV Wavelength? (1)

RivenAleem (1590553) | about a year ago | (#44494867)

The article makes no mention of the new wavelength, is it the same? It does mention a 10nm node, but that could be the targeted process geometry.

Re:EUV Wavelength? (0)

Anonymous Coward | about a year ago | (#44494909)

13.5nm

Re:EUV Wavelength? (2)

ebno-10db (1459097) | about a year ago | (#44495843)

13.5nm

No wonder the GP didn't see it - that's a really small font.

Fabrication sizes (0)

Anonymous Coward | about a year ago | (#44494877)

If we've reached the limits with what ultraviolet lithography can do already at 28nm, then how can Intel and other companies produce chips fabricated on smaller scales, given that they are alreaday at 22nm with 14nm coming within the next year or so?

Re:Fabrication sizes (1)

Anonymous Coward | about a year ago | (#44494973)

Multiple patterning and immersion lithography.

Re:Fabrication sizes (4, Funny)

c0lo (1497653) | about a year ago | (#44494993)

If we've reached the limits with what ultraviolet lithography can do already at 28nm, then how can Intel and other companies produce chips fabricated on smaller scales, given that they are alreaday at 22nm with 14nm coming within the next year or so?

Aren't those chips made of silicone [wikipedia.org] ? Maybe they stretch the chip before etching and let it shrink after.

(ducks)

Re:Fabrication sizes (0)

Anonymous Coward | about a year ago | (#44496375)

(ducks)

(shrinks)
    FTFY.

Re:Fabrication sizes (1)

kalyptein (313110) | about a year ago | (#44497667)

You may think you're joking, but there is actually a microfab technique based on shrinky-dinks. Pattern some thermoplastic and then cook it to shrink the dimensions. It's more for creating micro-scale forms on the cheap, rather than for these sort of nano-scale silicon features, but the idea isn't totally crazy.

Re:Fabrication sizes (1)

c0lo (1497653) | about a year ago | (#44503613)

You may think you're joking, but there is actually a microfab technique based on shrinky-dinks.

I knew that - a branch of soft lithography.
Just confused on why this would be a reason not to consider I'm joking.

Dupe (0)

Anonymous Coward | about a year ago | (#44494975)

http://hardware.slashdot.org/story/13/08/05/2336251/euv-chipmaking-inches-forward

Unfortunately... (1)

grouchomarxist (127479) | about a year ago | (#44494997)

...Slashdot dupe detection technology is still many years off. It will take major advancements in AI before we'll be able to detect duplicates like this [slashdot.org] .

Re:Unfortunately... (1)

jones_supa (887896) | about a year ago | (#44495793)

Actually that's an interesting point as it would be completely possible to make a quite good automated AI for that purpose.

Extreme? (0)

Anonymous Coward | about a year ago | (#44495567)

Because producing a chip isn't difficult enough, now you have to do it up a mountain.
Wait... What?

Re:Extreme? (0)

Anonymous Coward | about a year ago | (#44495795)

I was thinking while snowboarding on a shark while attached to a bungee chord at the top of the hill.

can somebody help me (0)

Anonymous Coward | about a year ago | (#44495569)

Current chips are etched using a deep ultraviolet wavelength of 193nm, but at a 28nm semiconductor process geometry, we've reached the limits of what a 193nm wavelength is small enough to etch.

does this mean intel's 22nm process is etched using magic?

Features smaller than one wavelength? (1)

Anonymous Coward | about a year ago | (#44495605)

I'm kind of surprised that photons of 193nm wavelength can be used to etch features smaller than one wavelength (28nm).

How is that possible?

Re:Features smaller than one wavelength? (1)

Anonymous Coward | about a year ago | (#44495799)

Magnets!

Re:Features smaller than one wavelength? (0)

Anonymous Coward | about a year ago | (#44496021)

I'm kind of surprised that photons of 193nm wavelength can be used to etch features smaller than one wavelength (28nm).

How is that possible?

Science has finally developed magic!

Re:Features smaller than one wavelength? (1)

Anonymous Coward | about a year ago | (#44497355)

Several things are done. For example, by doing the exposures in water with a higher index of refraction than air or vacuum, the wavelength becomes closer to 134 nm. And although there is a limit roughly around the size of the wavelength, it is not an exact boundary and you can get down to 40-50% of the wavelength. Methods of using multiple exposures can push it further if the photoresist is sensitive in some nonlinear way, and additionally, use of multiple patterns and layers can make features on the edges of one pattern.

What about damaging the silicon? 13nm=Ionizing! (3, Interesting)

Theovon (109752) | about a year ago | (#44495805)

IIRC, there's been plenty of research into using 13nm UV to do lithography. Intensity was one issue. The issue not mentioned in the summary is that 13nm is ionizing. It actually damages the silicon (and probably also the masks). So using 193nm, we get high process variation in part due to lithographic aberations (another cause is the randomness of dopant insertion). At 13nm, we get high variation due to damaging the device.

What's up with the mirrors? (1)

gr8_phk (621180) | about a year ago | (#44496201)

The picture seems to show the EUV light bouncing off 9 or 10 mirrors. What's up with that? It seems like getting good alignment on all that would be nearly impossible. Or are those "active" mirrors used for progressively correcting the alignment? What's up with those things?

Thanks for any insight.

Re:What's up with the mirrors? (2, Informative)

Anonymous Coward | about a year ago | (#44496361)

The picture seems to show the EUV light bouncing off 9 or 10 mirrors. What's up with that? It seems like getting good alignment on all that would be nearly impossible. Or are those "active" mirrors used for progressively correcting the alignment? What's up with those things?

Thanks for any insight.

Can't use diffractive optics at those wavelengths -- have to use reflective optics to prep the beam. Also, the beam itself isn't used for alignment, but shines through a stencil-like 'mask' that causes the features to be patterned in the photoresist.

One more thing -- photolithography itself isn't directly etching anything. It's used to generate patterns in a photoresist layer that is THEN used as a protective layer for etching etc. Subtle details...

Re:What's up with the mirrors? (0)

Anonymous Coward | about a year ago | (#44497437)

It isn't that hard for a trained technician to align a dozen or more mirrors in systems with much tighter tolerances for the light beam than this. How alignments and corrections are made would come down more to logistics, and depend on how often it needs to be done and how much time is allocated for it.

The annon responses suck (1)

gr8_phk (621180) | about a year ago | (#44501997)

2 responses from annon and neither one explains why so many mirrors. Are masks in direct contact with the chip? If *not* then you could make fine adjustments with somewhat larger adjustments of these mirrors. But I speculate - hence the question. What's up with all those mirrors?

Re:What's up with the mirrors? (0)

Anonymous Coward | about a year ago | (#44506929)

The achievable Numerical Aperture (NA) of the optics is primarily determined by the number of mirrors. The higher the NA, the smaller the features that can be imaged. On the other hand, more mirrors result in more power losses due to the limited reflectivity. So there is an optimum somewhere.

These optical elements are often servo-controlled to align them, also in process. Between wafers the optical errors are mapped and subsequently corrected again for the next wafer. This reduces any errors by thermal drift for example.

Kilowatt range? (1)

cdrudge (68377) | about a year ago | (#44496555)

...but the power requirements could edge into the kilowatt range for each piece of equipment.

Maybe I'm not understanding something here, but a piece of machinery operating in a kilowatt range doesn't sound too bad. I got a dual 500watt shop light that operates in the kilowatt range. I'd be more than happy to chip in a quarter or two to pay for a few kilowatt-hours of power if I get one of the first processors. Hell, I'd even do a whole $20 and power the bad boy up for an entire week non-stop for the good of the country.

Re:Kilowatt range? (1)

Anonymous Coward | about a year ago | (#44497567)

Does your shop light produce kilowatts of near monochromatic light in the extreme ultraviolet range while being able to run for long times without damaging itself? EUV light sources are rather difficult to construct, especially with any reasonable tolerances in the output spectrum. You can't use simple near-neutral materials, but need a source with multiply ionized atoms to get high enough energy transitions, in a system where most of the output will not be the wavelength you want. Until free electron lasers catch up, making EUV sources of more than 100 W are big, inefficient, and quite difficult. The light sources for current production equipment is already about ~1% efficient, but the EUV stuff is another factor of 10 or more less efficient. So to get ~1 kW of EUV light, you could be talking about a device that uses 100s of kW of power (not that a practical such source works at a moment...).

Closer to reality? Really? (1)

GroeFaZ (850443) | about a year ago | (#44496719)

Stanley Cubrick did it in 1971, and it's been a classic since. Ah yes, the old ultra-violet. Nothing like milk plus to sharpen you up a bit.

might be end of the line too (1)

iggymanz (596061) | about a year ago | (#44497431)

10 nm likely will be the end of CMOS silicon chips, gates can't be thinner than a single layer of atoms and quantum effects cause all manner of leaks, unpredictability and problems. So some new type of tech will be needed after circa 2015, whether carbon nanotech or perhaps quantum effects utilized

Re:might be end of the line too (1)

Bengie (1121981) | about a year ago | (#44498615)

I hate it when electrons randomly tunnel out of a transistor, changing its value.

Re:might be end of the line too (1)

iggymanz (596061) | about a year ago | (#44500293)

transistors have been made that depend on quantum tunneling, and that work in predictable and digital manner. in one design gate voltage controls whether tunneling from one side to another is permitted or completely forbidden. In another a series of conductive "dots" on an insulator can hold charge or allow it to tunnel in or out based on a control voltage. so I'm looking forward to seeing which way industry goes in say three years, the business model of their survival depends on them making a solution

Alternative EUV Technology: Zplasma (1)

Henry Berg (3011877) | about a year ago | (#44502565)

There is an alternative technology for the production of EUV light at lithography power levels. Zplasma Stable DPP uses Sheared Flow Stabilization to stabilize the EUV-emitting plasma. Stable plasma results in light pulses that are 10-100 times longer than than those produced by the unstable plasmas of other sources. The source uses no tin and has a controlled end to each pulse that does not produce the high-energy debris and molten tin sputtering that have been obstacles for other light sources. We have prototyped and demonstrated the physics of Stable DPP in the lab. Zplasma is seeking funding and development partners to scale our prototype up to the 200 watt light source the industry needs. http://zplasma.com [zplasma.com] .
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