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How Modern CPUs Work

timothy posted more than 9 years ago | from the they-bend-the-1s-into-0s dept.

Hardware 8

Aron Schatz writes "ASE Labs explains how a typical single-cycle and multi-cycle CPU operate in today's world and some of the pitfalls associated with them. The assumptions given in the article are based on a RISC architecture, MIPS to be exact. You can read the article here."

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isn't /. supposed to be... (0, Offtopic)

flawedgeek (833708) | more than 9 years ago | (#12754108)

...News For Nerds, not Informational articles for nerds?

Informative? Yes. Interesting? Possibly.

Important? I think not.

Re:isn't /. supposed to be... (0)

Anonymous Coward | more than 9 years ago | (#12756364)

for you: CPU stands for Central processing Unit.......

credit where it is due (1, Informative)

Anonymous Coward | more than 9 years ago | (#12754437)

When the author of the article says MIPS, he means DLX, and where he says ASE Labs explains, he means Hennessy & Patterson explain. That's not to say there is no value in repeating the stuff for people who don't have the book, but he should at least give reference to the place he took most of the material from. For anyone who cares, chapter 3 of the second edition of Hennessy & Patterson's "Computer Architecture: A Quantitative Approach" covers the same topic, using the same simple five stage pipeline.

Re:credit where it is due (1)

aronschatz (570456) | more than 9 years ago | (#12754546)

I actually took the material (pictures) from the lecture slides of my class and they're only to better explain the pipelining. The text is from memory alone. And yes, I bought the book... but I never used it. What a waste of $120. It is amazing what you remember when you enjoy a class.

Re:credit where it is due (0)

Anonymous Coward | more than 9 years ago | (#12754751)

One of the diagrams comes directly from the text, and the five stage example pipeline and DLX instruction set make it obvious that you were taught from that book. So I would say that you did learn from it, regardless of how much or little of it you read. Sections 3.9 and 4.8 present pipelines from real processors (the MIPS R4000 and PowerPC 620), which may be of interest to you. They are somewhat more complex than the simple DLX pipeline.

If you are particularly interested, you can also find various presentations and papers by Intel, DEC and others presenting pipelines and other microarchitectural details for their microprocessors.


And I still think you should credit Hennessey & Patterson, since that is where your material comes from, even if indirectly. If someone wanted more detail on it, that is the source that they should look in.

Re:credit where it is due (1)

tez_h (263659) | more than 9 years ago | (#12756032)

Yes, I have to agree with the OP. This stuff looked very familiar to me too. The diagrams, and worked examples were a dead giveaway.

While I'm not trying to imply intentional plagiarism (which, unfortunately I might have done in the article itself), you *really* should attribute your source here, since it really is *very* close to the original.

-Tez

Newb (-1, Offtopic)

Anonymous Coward | more than 9 years ago | (#12754592)

Every one knows 'timmothy' is new here, give him a break. I've gotten first post - like 10^100 more times than him.

Not really that relevant. (2, Informative)

Hast (24833) | more than 9 years ago | (#12755734)

Sure it's a nice intro to pipelining for those that haven't taken an introduction to computer engineering; but it doesn't have that much to do with how a modern CPU works.

It is true that modern CPUs use pipelining, but the basic model described here is only used if you want to try and implement your own CPU for fun. Modern CPUs are super-scalar monsters with out-of-order execution and custom internal micro code. But I guess you'll have to start somewhere.

If you want look at what a real modern CPU looks like I recommend Hannibal's excellent CPU articles over at ArsTechnica [arstechnica.com] . He has gone over quite a few different architectures as well as the CPUs found in the X360 and PS3. Interesting reading for all! There are also some articles on stuff like cache and memory architecture.
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